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参数资料
| 型号： | LB1825 |
| 元件分类： | 运动控制电子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 2 A, PDIP28 |
| 封装： | HEAT SINK, DIP-28 |
| 文件页数： | 4/9页 |
| 文件大小： | 139K |
| 代理商： | LB1825 |
Pin Assignment
Pin Functions
Clock Divisor Switching
Note: I. Total divisor = (divisor (1)
× divisor (2))
PLL servo frequency = (crystal oscillator frequency)/(total divisor)
II. External clock mode
The PLL servo frequency = external input frequency
No. 4845-4/9
LB1825
Pin No.
Symbol
Function
Notes
1
FC
Frequency characteristics correction
A capacitor must be inserted between pin 1 and ground.
2 to 7
IN1+ to IN3+,
Hall element inputs
Taken as high when IN+ > IN–, and as low otherwise.
IN1– to IN3–
8 to 10
OUT1 to OUT3
Outputs
11
Rf
Output current detector
A capacitor must be inserted between pin 11 and ground.
12
VREG
Stabilized power supply output
13
LD
Phase lock detector output
On when the phase is locked. This pin is an open-collector
output.
14
VCC
Power supply
15
ERROUT
Error amplifier output
16
ERRIN
Error amplifier input
17
PD
Phase comparator output
18
VCS
Current limiter reference voltage generation
19
GND
Ground
20
FGIN
FG amplifier input
Also functions as the Hall FG switching pin.
21
FGOUT1
FG amplifier output
The LB1825 goes to stop mode when pin 21 is set low.
22
FGOUT2
FG/Hall FG output
This pin is an open-collector output.
23
S/B
Brake command input
Braking is applied when pin 23 is set high.
24 to 26
N1 to N3
Reference frequency divisor switching
The clock divisor is set by the states of pins 24 to 26.
27
OSC
Crystal oscillator/external clock input
28
F/R
Forward/reverse switching
Pin N1
Pin N2
Divisor (1)*I
L
*II
L
M
128
L
H
256
M
L
512
M
1024
M
H
2048
H
L
4096
H
M
8192
H
16384
Pin N3
Divisor (2)*I
L
5
M
4
H
3
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