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参数资料
| 型号： | LB1875 |
| 元件分类： | 运动控制电子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 0.03 A, PDSO36 |
| 封装： | HSOP-36 |
| 文件页数： | 11/17页 |
| 文件大小： | 335K |
| 代理商： | LB1875 |
LB1875
No. 6002-3/17
Electrical Characteristics at Ta = 25
°C, V
CC = 12V
Continued on next page
min
typ
max
Power supply current
ICC
30
40
mA
[5V regulated output ]
Output fluctuation
VREG
4.65
5.0
5.35
V
Voltage fluctuation
ΔV
REG1VCC=8 to 13.5V
40
100
mV
Load fluctuation
ΔV
REG2IO=0 to –15 mA
20
100
mV
Temperature coefficcient
ΔV
REG3
Design target value
0
mV/
°C
[Output Section]
Output saturation voltage
VO(sat)1-1 UH, VH, WH "L" level, IO=50
μA0.1
0.3
V
Vo(sat)1-2 UH, VH, WH "L" level, IO=10 mA
0.9
1.1
V
VO(sat)2
UH, VH, WH "L" level, IO=20 mA
VCC–0.9
VCC–1.1
V
VO(sat)3
UL, VL, WL, IO=20 mA
0.2
0.4
V
Output leak current
IOleak
UL, VL, WL
10
μA
[Hall amplifier]
Input bias current
IHB(HA)
–4
–1
μA
Same-phase input voltage range
VICM
0
VCC–2.0
V
Hall input sensitivity
30
mVP-P
Hysteresis width
ΔV
IN(HA)
8
14
24
mV
Input voltage L->H
VSLH
7
mV
Input voltage H->L
VSHL
–7
mV
[FG/Schmitt comparator section]
Input bias current
IB(FGS)
–4
–1
μA
Same-phase input voltage range
VICM(FGS)
0
VCC–2.0
V
Input sensitivity
VIN(FGS)
30
mVP-P
Hysteresis width
ΔV
IN(FGS)
Design target value
8
14
24
mV
Input voltage L->H
VSLH(FGS) Design target value
7
mV
Input voltage H->L
VSHL(FGS) Design target value
–7
mV
[PWM oscillator]
Output High level voltage
VOH(OSC)
2.7
3.0
3.3
V
Output Low level voltage
VOL(OSC)
1.5
1.8
2.1
V
Oscillator frequency
f(OSC)
C=2200 pF
30
kHz
Amplitude
V(OSC)
1.0
1.2
1.4
VP-P
[PWM output]
Output saturation voltage
VOL(PWM) IPWM=15 mA
0.9
2.0
V
Output leak current
IL(PWM)
VO=VCC
10
μA
[CSD oscillator ]
Output High level voltage
VOH(CSD)
2.5
2.8
3.1
V
Output Low level voltage
VOL(CSD)
0.55
0.85
1.15
V
External C charge current
ICHG1
–13
–10
–7
μA
External C discharge current
ICHG2
7
10
13
μA
Oscillator frequency
fCSD
C=0.068
μF
35
Hz
Amplitude
VCSD
1.75
1.95
2.15
VP-P
[Phase comparator output]
Output High level voltage
VPDH
IOH=–100
μAV
REG–0.2
VREG–0.1
V
Output Low level voltage
VPDL
IOH=100
μA
0.1
0.2
V
Output source current
IPD
+
VPD=VREG/2
–0.6
mA
Output sink current
IPD
–
VPD=VREG/2
1.5
mA
[Phase lock detector output]
Output saturation voltage
VOL(LD)
ILD=10 mA
0.1
0.4
V
Output leak current
IL(LD)
VO=VCC
10
μA
Ratings
Parameter
Symbol
Conditions
Unit
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