参数资料
型号: LC72121M
元件分类: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 160 MHz, PDSO24
封装: MFP-24
文件页数: 21/23页
文件大小: 377K
代理商: LC72121M
Procedures for Input and Output of Serial Data
This product uses the CCB (Computer Control Bus), which is Sanyo’s audio product serial bus format, for data input and
output. This product adopts an 8-bit address CCB format.
No. 5815-7/23
LC72121, 72121M, 72121V
I/O mode
Address
Function
B0
B1
B2
B3
A0
A1
A2
A3
Control data input (serial data input) mode
1
IN1 (82)
0
1
0
1
0
24 bits of data are input.
See the “DI Control Data (serial data input)” section for details on the
content of the input data.
Control data input (serial data input) mode
2
IN2 (92)
1
0
1
0
1
0
24 bits of data are input.
See the “DI Control Data (serial data input)” section for details on the
content of the input data.
Data output (serial data output) mode
3
OUT (A2)
0
1
0
1
0
1
0
The number of bits output is equal to the number of clock cycles.
See the “DO output Data (serial data output)” section for details on the
content of the output data.
Normally high
Normally low
I/O mode determined
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