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参数资料
| 型号： | LC72147V |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 180 MHz, PDSO24 |
| 封装： | SSOP-24 |
| 文件页数： | 5/22页 |
| 文件大小： | 154K |
| 代理商： | LC72147V |
Structure of the DO Output Data (serial output data)
(3) OUT
No. 6675-13/22
LC72147V
(1)
IN-PORT
(2)
U-CTR
(4)
ADC1
(3)
ADC0
I1
I2
I3
I4
I5
*
0
1
0
1
0
1
DI
DO
0
First data out
Address
C12
C13
C14
C15
C16
C17
C18
C19
C4
C5
C6
C7
C8
C9
C10
C11
C0
C1
C2
C3
AD01
AD02
AD03
AD04
AD05
AD14
AD15
AD13
AD10
AD11
AD12
AD00
No.
Control block/data
Content
Related data
The bits I1 to I5 are set to the latched states of the I/O pins I/O-1 to I/O-5. These states
are latched at the point the IC enters data output mode.
The pin states are latched regardless of the pin mode (input or output).
Pin state = high: 1
low: 0
I/O-1 to I/O-5
(1)
I/O port data
I5 to I1
The bits C19 to C0 are set to the latched content of the 20-bit binary general-purpose
counter.
C19
← MSB of the binary counter
C0
← LSB of the binary counter
CTS0
CTS1
CTE
(2)
General-purpose
counter binary data
C19 to C0
The bits AD05 to AD00 are set to the latched result of the A/D conversion of the ADC0
pin input signal.
AD05
← MSB
AD00
← LSB
ADI0
ADI1
ADS
(3)
A/D converter ADC0 data
AD05 to AD00
The bits AD15 to AD10 are set to the latched result of the A/D conversion of the ADC1
pin input signal.
AD15
← MSB
AD10
← LSB
ADI0
ADI1
ADS
(4)
A/D converter ADC1 data
AD15 to AD10
*: Bits that are set to 0.
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相关代理商/技术参数 |
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| LC72148V | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:Electronic Tuning PLL Frequency Synthesizer for Car Stereo Systems |
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| LC7215 | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:MW/LW PLL Frequency Synthesizers |
| LC72151V | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer for Electronic Tuning in Car Audio Systems |
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