参数资料
型号: LC7219M
元件分类: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 160 MHz, PDSO24
封装: MFP-24
文件页数: 8/12页
文件大小: 212K
代理商: LC7219M
LC7219, 7219M
No.3661–5/12
Table 1. Input data bits
Table 2. Reference frequency selection
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Table 2. Reference frequency selection–continued
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Serial Data Input Timing
The timing for the serial data input is shown in figure 2. The first four bits, A0 to A3, are the mode select bits.
In 36-bit transfer mode, the final data bits are T0 and T1, and in 24-bit transfer mode, O6 and CTEN.
Note
t1≥1.5s, t2≥0s, t3≥1.5s, t4<1.5s
Figure 2. Input timing
The reference frequency is selected by bits R0 to R3 as shown in table 2.
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