参数资料
型号: LC7871E
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封装: QFP-100
文件页数: 14/19页
文件大小: 299K
代理商: LC7871E
Continued from preceding page.
No. 4861-4/19
LC7871E, 7871NE
Parameter
Symbol
Conditions
min
typ
max
Unit
RESET, SFSY, PW, SBSY, CE, DI, CL, MUTE, TEST,
IIL (1)
TEST1, TEST2, SON, M1/M2, N/P1, N/P2, VRESET,
–5
A
Input low level current
HRESET: VIN = VSS
IIL (2)
PALID: VIN = VSS
–400
–200
–60
A
SBCK, 1WE, RAS, 1A0 to 7, 2A0 to 7, CAS, OE, 2WE,
Output high level voltage
VOH (1)
CDGM, TRANS0 to 5, 2FSC, YS, CSYNC, VSYNC,
VDD – 1
VDD
V
EFLG, FSX, FSC, 1DB0 to 3, 2DB0 to 3: IO = –0.5 mA
SBCK, 1WE, RAS, 1A0 to 7, 2A0 to 7, CAS, OE, 2WE,
VOL (1)
CDGM, TRANS0 to 5, 2FSC, YS, CSYNC, VSYNC,
VSS
0.4
V
Output low level voltage
EFLG, FSX, FSC, 1DB0 to 3, 2DB0 to 3: IO = 2 mA
VOL (2)
DO: IO = 5 mA
VSS
0.75
V
Output off leakage current
IOFF
DO, 1DB0 to 3, 2DB0 to 3
–5
+5
A
Built-in feedback resistance
RX
XIN1, XIN2, 4FSC2, FSCIN
1
M
6-bit D/A converter
VREF (1)
ROUT, BOUT, GOUT, TRANS
3.95
4
4.05
V
reference voltage
6-bit D/A converter
RDA (1)
ROUT, BOUT, GOUT, TRANS
150
output resistance
8-bit D/A converter
VREF (2)
VIDEO
3.65
3.70
3.75
V
reference voltage
8-bit D/A converter
RDA (2)
VIDEO
150
output resistance
8-bit D/A converter output level
VDAC
VIDEO: Figure 9
Random read/write cycle time
tRC
Figures 2 and 3
400
ns
Page mode cycle time
tPC
Figures 4 and 5
130
ns
RAS precharge time
tRP
Figures 2, 3, 4, 5 and 6
100
ns
RAS pulse width
tRAS
Figures 2, 3 and 6
120
ns
RAS pulse width (page mode)
tRASP
Figures 4 and 5
18000
ns
RAS hold time
tRSH
Figures 2, 3, 4 and 5
60
ns
CAS hold time
tCSH
Figures 2 and 3
120
ns
CAS pulse width
tCAS
Figures 2, 3, 4 and 5
60
ns
CAS precharge time
tCPN
Figure 6
50
ns
CAS precharge time (page mode)
tCP
Figures 4 and 5
50
ns
Row address setup time
tASR
Figures 2, 3, 4 and 5
100
ns
Row address hold time
tRAH
Figures 2, 3, 4 and 5
50
ns
Column address setup time
tASC
Figures 2, 3, 4 and 5
0
ns
Column address hold time
tCAH
Figures 2, 3, 4 and 5
50
ns
Read command setup time
tRCS
Figure 2
150
ns
Read command hold time
tRCH
Figure 2
120
ns
(referenced to CAS)
Read command hold time
tRRH
Figure 2
120
ns
(referenced to RAS)
Write command setup time
tWCS
Figure 3
100
ns
Write command hold time
tWCH
Figure 3
50
ns
Write command pulse width
tWP
Figure 3
150
ns
Write data setup time
tDS
Figure 3
100
ns
Write data hold time
tDH
Figure 3
100
ns
CAS setup time
tCSR
Figure 6
50
ns
(CAS before RAS)
CAS hold time (CAS before RAS)
tCHR
Figure 6
50
ns
RAS precharge CAS active time
tRPC
Figure 6
50
ns
Read data setup time
tRDS
Figures 2, 4 and 5
20
ns
Read data hold time
tRDH
Figures 2, 4 and 5
10
ns
VIDEO setup time
tVS
Superimposition: Figure 7
20
25
ns
SBCK output delay time
tSD
Figure 8
NTSC mode
4.749
5.029
s
PAL mode
4.793
5.075
s
SBCK cycle frequency
fSC
Figure 8
NTSC mode
223.7
kHz
PAL mode
221.7
kHz
PW setup time
tPWS
Figure 8
100
ns
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