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参数资料
| 型号： | LC78836M |
| 元件分类： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 16-BIT DAC, PDSO24 |
| 封装： | MFP-24 |
| 文件页数： | 7/12页 |
| 文件大小： | 310K |
| 代理商： | LC78836M |
Pin Assignment
Pin Functions
No. 5127-4/12
LC78836M
Pin No.
Symbol
Function
1
REFH
High-level reference voltage
Normally connected through a capacitor to AGND.
2
VrefH
High-level reference voltage input
3
MUTE
Muting signal input
The soft muting function is turned on by a high input.
4
D/N
Standard/double-speed mode switching input
Double-speed operation when high, standard when low.
5
BCLK
Bit clock input
6
DATA
Digital audio data input
Input is in a twos-complement MSB-first format.
7
LRCK
LR clock input
CH1 is input when this pin is high, CH2 when low.
8
DVDD
Digital system power supply
Clock output
9
CKOUT
In 392 fs mode: outputs a 196 fs clock
In other modes: outputs a clock with the XIN frequency
10
XOUT
Crystal oscillator output (system clock output)
11
XIN
Crystal oscillator input (system clock input)
12
DGND
Digital system ground
13
INITB
Initialization signal input
The LSI is initialized when this pin is set low.
14
EMP
De-emphasis filter on/off switching
The filter is turned on when this pin is set high, off when set low.
De-emphasis filter mode (32, 44.1, or 48 kHz) selection
15
FS1
16
FS2
System clock selection
17
CKSL1
18
CKSL2
19
VrefL
Low-level reference voltage input
20
REFL
Low-level reference voltage
Normally connected through a capacitor to AGND.
21
CH2OUT
CH2 analog output
22
AGND
Analog system ground
23
CH1OUT
CH1 analog output
24
AVDD
Analog system power supply
FS1
L
H
L
FS2
L
H
fs
44.1 kHz
32 kHz
48 kHz
CKSL1
CKSL2
System clock
L
384 fs
L
H
392 fs
H
L
448 fs
H
512 fs
Top view
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