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| 型号： | LC89057W-VF4-E |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封装： | 7 X 7 MM, SQFP-48 |
| 文件页数： | 11/61页 |
| 文件大小： | 355K |
| 代理商： | LC89057W-VF4-E |
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LC89057W-VF4-E
No. 7202-19/61
8.2 Bi-Phase Signal Input/Output
8.2.1 Bi-phase signal input reception range
The input data reception range depends on the PLL lock frequency setting done with PLLSEL. The relationship
between this setting and the guaranteed reception range is shown below.
Table 8.4. Relationship between PLL Output Clock Setting and Reception Range (FSLIM0,1 = 0)
PLL Output Clock Setting
Input Data Reception Range
512fs (PLLSEL = 0)
28kHz to 105kHz
256fs (PLLSEL = 1)
28kHz to 195kHz
The fs reception range for input data within the above PLL output clock setting range can be controlled. This setting
is performed with FSLIM0,1. When this function is used, input data that exceeds the setting range is considered as
an error and the clock source is automatically switched to the XIN source and RDATA output data is according to
the RDTSEL setting.
8.2.2 Bi-phase signal input/output pins (RX0 to RX6, RXOUT)
There are 7 digital data input pins. Moreover, data modulated with the modulation function can also be selected and
thus selection from among 8 signals including this signal is possible. However, the pins that can be selected is
restricted by the setting conditions.
(1) The six pins RX0 and RX2 to RX6 are TTL level input pins with 5V input level tolerable.
(2) RX1 is a coaxial-compatible input pin with built-in amplifier that can receive up to 200mVp-p data.
The demodulation input and RXOUT output signals can each be selected independently.
(1) The demodulation data is selected with RISEL0 to 2.
(2) The RXOUT output data is selected with ROSEL0 to 2.
RXOUT can be muted with RXOFF. Muting is recommended when not using RXOUT in order to reduce clock
jitter.
The data input status can be monitored with the RXMON setting. The status of each data input pin is stored in CCB
address 0xEA and output registers DO0 to DO7. Since this function uses the XIN clock, the oscillation amplifier
must be set to the continuous operation mode when RXMON is set.
Demodulation input pin switching can be performed via PLL unlock with the ULSEL setting. As a result, data
switching can be accurately communicated to peripheral devices.
The interval from pin switching through RISEL0 to 2 until data is received is about 250
s to 350s. This function
also requires that the oscillation amplifier be set to the continuous operation mode.
Input pin selection
Internal supply signal
RX0
RX2
RX3
RX1
RX0
RX2
RX3
RX1
250
s to 350 s
Figure 8.5. Input Pin Selection Processing via PLL Unlock
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