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参数资料
| 型号： | LC89057W-VF4-E |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封装： | 7 X 7 MM, SQFP-48 |
| 文件页数： | 38/61页 |
| 文件大小： | 355K |
| 代理商： | LC89057W-VF4-E |
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LC89057W-VF4-E
No. 7202-43/61
CCB address: 0xE8; Command address: 5; Demodulation function: Clock source; RDA TA output setting
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
0
1
0
1
0
CAU
CAL
DI15
DI14
DI13
DI12
DI11
DI10
DI9
DI8
0
RDTMUT
RDTSTA
RDTSEL
0
RCKSEL
OCKSEL
SELMTD
Output clock source switching method setting
0: Simultaneously switch R system and S system according to OCKSEL. (initial
value)
1: Switch R system according to RCKSEL and fix S system to XIN.
OCKSEL
Clock source setting when SELMTD = 0
0: Use XIN clock as source during PLL lock. (initial value)
1: Use XIN clock as source regardless of PLL status.
RCKSEL
Clock source setting when SELMTD = 1
0: Use XIN clock as source during PLL lock. (initial value)
1: Use XIN clock as source regardless of PLL status.
RDTSEL
RDATA output setting during PLL unlock
0: Output SDIN data during PLL unlock. (initial value)
1. Mute during PLL unlock.
RDTSTA
RDATA output setting
0: According to RDTSEL (initial value)
1: Output SDIN input data regardless of PLL status.
RDTMUT
RDATA mute setting
0: Output data selected with RDTSEL.
1: Muted
When the oscillation amplifier is set to permanent continuous operation with AMPOPR0,1 or f changes are set not
to be reflected to the error flag with FSERR, OCKSEL and RCKSEL can switch the clock source while maintaining
the RERR status. However, if none of these settings is performed, RERR outputs an error once during switching.
To input data to SDIN, select a clock synchronized with the SDIN input data.
The XIN source can be switched to while maintaining the PLL locked status. However, since clock and data output
switching can be set individually for each, it is recommended to select mute or SDIN data for the output data during
XIN source switching.
If the setting to automatically stop the oscillation amplifier as the PLL gets locked, XIN source switching from the
PLL locked status is executed after the resonator oscillates stably. Moreover, output data switching at this time is
done according to XIN source switching.
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