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参数资料
| 型号： | LC898023KW |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP208 |
| 封装： | 28 X 28 MM, SQFP-208 |
| 文件页数： | 3/13页 |
| 文件大小： | 78K |
| 代理商： | LC898023KW |
No. 6614-11/13
LC898023KW, 898023KL
AD0, AD1, AD2 (input)
A/D converter auxiliary inputs.
DA0, DA1, DA2 (input)
D/A converter auxiliary inputs.
TES (input)
TES comparator input.
TDO (output)
Tracking control signal output.
FDO (output)
Focus control signal output.
SLDO (output)
Sled control signal output.
SPDO (output)
Spindle control signal output.
2. EFM Input Block Pins
EFMIN (input)
EFM signal input.
The high-frequency components of the RF signal acquired from the RF amplifier are cut with a capacitor, and this
pin inputs that signal biased by the value of the SLCO0 to SLCO3 outputs passed through a low-pass filter.
EFMIN2 (input)
Used to change the time constant of the low-pass filter.
SLCIST1, SLCIST2 (input)
Slice level controller charge pump bias resistor connection.
SLCO0, SLCO1, SLCO2, SLCO3 (output)
Slice level controller charge pump outputs.
These levels bias the RF signal input to the EFMIN pin after being passed through a low-pass filter.
DSLB (output)
Slice level control PWM output.
EFMO (output)
Post-binarization EFM signal output. (For monitoring)
3. EFM Clock Generation Block Pins
FR (input)
EFM reproduction PLL VCO bias resistor connection.
PDO, PDS1, PDS2, PDS3 (output)
EFM reproduction PLL lag-lead filter connection.
PCKISTF (input)
EFM reproduction PLL frequency comparator charge pump bias resistor connection.
PCKISTP (input)
EFM reproduction PLL phase comparator charge pump bias resistor connection.
RPO (output)
P/N balance adjustment.
OPP (input)
P/N balance adjustment.
PCK2 (output)
EFM reproduction bit clock output.
4. Jitter Discrimination Pins
JITC (output)
Jitter output.
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