- 您现在的位置：买卖IC网 > PDF目录177781 > LCK4802 Low-Voltage PECL Differential Clock PDF资料下载
参数资料
| 型号： | LCK4802 |
| 英文描述： | Low-Voltage PECL Differential Clock |
| 中文描述： | 低电压PECL差分时钟 |
| 文件页数： | 4/10页 |
| 文件大小： | 156K |
| 代理商： | LCK4802 |
Agere Systems Inc.
3
Preliminary Data Sheet
July 2001
Low-Voltage PECL Differential Clock
LCK4802
Pin Information
Table 1. Pin Description
Pin Number
Pin Name
I/O1
Type
Description
1VDDD
P
Power Supply
3.3 V power supply.
2TESTM
I
LVCMOS
M divider test pins.
3VSS
G
Ground
Digital ground.
4
PCLK0_EN
I
LVCMOS
PCLK0 enable.
5
PCLK1_EN
I
LVCMOS
PCLK1 enable.
6
REF_SEL
I
LVCMOS
Selects the PLL input reference clock.
7
PECL_CLK
I
Differential PECL
PLL reference clock input.
8
PECL_CLK
I
Differential PECL
PLL reference clock input.
9
PECL_CLK
I
Differential LVPECL
PLL reference clock input.
10
PECL_CLK
I
Differential LVPECL
PLL reference clock input.
11
EXTFB_EN
I
LVCMOS
External feedback enable.
12
EXTFB_IN
I
Differential PECL
External feedback input.
13
EXTFB_IN
I
Differential PECL
External feedback input.
14
VDDPECL
P
Power Supply
Output buffers power supply.
15
EXTFB_OUT
O
Differential PECL
External feedback output clock.
16
EXTFB_OUT
O
Differential PECL
External feedback output clock.
17
VDDPECL
P
Power Supply
Output buffers power supply.
18
PCLK1
O
Differential PECL
Output clock 1.
19
PCLK1
O
Differential PECL
Output clock 1.
20
PCLK0
O
Differential PECL
Output clock 0.
21
PCLK0
O
Differential PECL
Output clock 0.
22
VDDPECL
P
Power Supply
Output buffers power supply.
23
PLLREF_EN
I
LVCMOS
PLL reference enable.
24
PLL_BYPASS
I
LVCMOS
Input signal PLL bypass.
25
VSS
P
Ground
Analog ground for PLL.
26
RESET
I
LVCMOS
PLL bypass reset (for test use).
27
SEL[4]
I
LVCMOS
Selection of input and feedback frequency.
28
SEL[3]
I
LVCMOS
Selection of input and feedback frequency.
29
SEL[2]
I
LVCMOS
Selection of input and feedback frequency.
30
SEL[1]
I
LVCMOS
Selection of input and feedback frequency.
31
SEL[0]
I
LVCMOS
Selection of input and feedback frequency.
32
VDDA
P
Power Supply
3.3 V filtered for PLL (PLL power supply).
1. P = power, I = input, G = ground, O = output.
相关PDF资料 |
PDF描述 |
|---|---|
| LCMXO2280E-5FT256C | |
| LCMXO2280E-5M132C | |
| LCMXO1200C-3B256I | |
| LCMXO640E-4T144C | |
| LCMXO1200E-4T100C | |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LCK4950 | 制造商:AGERE 制造商全称:AGERE 功能描述:Low-Voltage PLL Clock Driver |
| LCK4953 | 制造商:AGERE 制造商全称:AGERE 功能描述:Low-Voltage PLL Clock Driver |
| LCK4972 | 制造商:AGERE 制造商全称:AGERE 功能描述:Low-Voltage PLL Clock Driver |
| LCK4973 | 制造商:AGERE 制造商全称:AGERE 功能描述:Low-Voltage PLL Clock Driver |
| LCK4993 | 制造商:AGERE 制造商全称:AGERE 功能描述:Low-Voltage PLL Clock Drivers |
发布紧急采购，3分钟左右您将得到回复。