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参数资料
| 型号： | LF48908JC31 |
| 厂商： | LOGIC DEVICES INC |
| 元件分类： | 数字信号处理外设 |
| 英文描述： | Video Convolver |
| 中文描述： | 8-BIT, DSP-CONVOLVER, PQCC84 |
| 封装： | PLASTIC, LCC-84 |
| 文件页数： | 7/16页 |
| 文件大小： | 315K |
| 代理商： | LF48908JC31 |
DEVICES INCORPORATED
7
LF48908
Two Dimensional Convolver
1
2
3
4
5
6
7
8
9
10
11
08/9/2000–LDS.48908-J
Video Imaging Products
be ignored. If the LF48908 is not in
active operation or if the innactive
Coefficient Register is being written to
during active operation.
Cascade Operation
The Cascade Input lines (CASI
15-0
)
and Cascade Output lines (CASO
7-0
)
are used to allow convolutions of
kernel sizes larger than 3 x 3. The
Cascade Input lines are also used to
allow convolutions on row lengths
longer than 1024 pixels. The Cascade
Mode Bit (Bit 0) of the Initialization
Register determines the function of
the Cascade Input lines. If the Cas-
cade Mode Bit is a “0”, then the
Cascade Input lines are to be used to
cascade multiple LF48908s together to
perform convolutions of larger kernel
sizes. CASI
15-0
will be left shifted (by
an amount determined by bits 7 and 8
of the Initialization Register) and then
added to DOUT
19-0
. Cascading is
accomplished by connecting CASO
7-0
and DOUT
19-0
of one LF48908 to
DIN
7-0
and CASI
15-0
respectively of
another LF48908. If the Cascade
Mode Bit is a “1”, then the Cascade
Input lines are to be used with exter-
nal row buffers to allow for longer
row lengths. In this mode, the Cas-
cade Input lines are split into two 8-bit
data busses (CASI
15-8
and CASI
7-0
)
which are fed directly into the multi-
plier array.
T
ABLE
3.
I
NITIALIZATION
R
EGISTER
BIT
FUNCTION
0
CASCADE MODE
0
Multiplier input from internal row buffers
1
Multiplier input from external buffers
2
1
INPUT DATA DELAY
0
0
No data delay registers used
0
1
One data delay register used
1
0
Two data delay registers used
1
1
Three data delay registers used
3
INPUT DATA FORMAT
0
Unsigned integer format
1
Two’s complement format
4
COEFFICIENT DATA FORMAT
0
Unsigned integer format
1
Two’s complement format
6
5
OUTPUT ROUNDING
0
0
No rounding
0
1
Round to 16 bits (i.e. DOUT19-4)
1
0
Round to 8 bits (i.e. DOUT19-12)
1
1
Not valid
8
7
CASI15-0 INPUT SHIFT
0
0
No shift
0
1
Shift CASI15-0 left two
1
0
Shift CASI15-0 left four
1
1
Shift CASI15-0 left eight
A
2-0
FUNCTION
000
Load Row Buffer Length
Register
001
Load ALU Microcode Register
010
Load Coefficient Register 0
011
Load Coefficient Register 1
100
Load Initialization Register
101
Select Coefficient Register 0
for Internal Processing
110
Select Coefficient Register 1
for Internal Processing
111
No Operation
T
ABLE
4.
C
ONTROL
L
OGIC
A
DDRESS
M
AP
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PDF描述 |
|---|---|
| LF48908JC50 | Video Convolver |
| LF9501 | Programmable Line Buffer |
| LF9501JC20 | Programmable Line Buffer |
| LF9501JC25 | Programmable Line Buffer |
| LFM20-12 | 20W Ultraminiature Open Frame Switching Power Supplies |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LF48908JC50 | 制造商:LOGIC 制造商全称:LOGIC 功能描述:Video Convolver |
| LF48908JI25 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Video Convolver |
| LF48908JI31 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Video Convolver |
| LF48908JI50 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Video Convolver |
| LF48908QC25 | 制造商:LOGIC 制造商全称:LOGIC 功能描述:Two Dimensional Convolver |
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