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参数资料
| 型号： | LIS3L02DQ |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 模拟信号调理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, QCC44 |
| 封装： | 7 X 7 MM, 1.80 MM HEIGHT, QFN-44 |
| 文件页数： | 20/20页 |
| 文件大小： | 473K |
| 代理商： | LIS3L02DQ |
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LIS3L02DQ
ing the acknowledge pulse. The receiver must then pull the data line LOW so that it remains stable low
during the HIGH period of the acknowledge clock pulse. A receiver which has been addressed is obliged
to generate an acknowledge after each byte of data has been received.
The I2C embedded inside the LIS3L02DQ behaves like a slave device and the following protocol must be
adhered to. After the start condition (ST) a slave address is sent, once a slave acknowledge has been
returned, a 8-bit sub-address will be transmitted: the 7 LSB represent the actual register address while the
MSB enables address autoincrement. If the MSB of the SUB field is 1, the SUB (register address) will be
automatically incremented to allow multiple data read/write.
If the LSB of the slave address is ‘1’ (read), a repeated START condition will have to be issued after the
two sub-address bytes; if the LSB is ‘0’ (write) the Master will transmit to the slave with direction un-
changed.
Transfer when Master is writing one byte to slave
Transfer when Master is writing multiple bytes to slave:
Transfer when Master is receiving (reading) one byte of data from slave:
Transfer when Master is receiving (reading) multiple bytes of data from slave
Data is transmitted in byte format. Each data transfer contains 8 bits. The number of bytes transferred per
transfer is unlimited. Data is transferred with the Most Significant Bit (MSB) first. If a receiver can’t receive
another complete byte of data until it has performed some other function, it can hold the clock line, SCL
LOW to force the transmitter into a wait state. Data transfer only continues when the receiver is ready for
another byte and releases the data line. If a slave receiver doesn’t acknowledge the slave address (i.e. it
is not able to receive because it is performing some real time function) the data line must be left HIGH by
the slave. The Master can then abort the transfer. A LOW to HIGH transition on the SDA line while the
SCL line is HIGH is defined as a STOP condition. Each data transfer must be terminated by the generation
of a STOP condition.
In order to read multiple bytes, it is necessary to assert the most significant bit of the sub-address field. In
other words, SUB(7) must be equal to 1 while SUB(6-0) represents the address of first register to read.
Master
ST
SAD + W
SUB
DATA
SP
Slave
SAK
Master
ST
SAD + W
SUB
DATA
SP
Slave
SAK
Master
ST
SAD + W
SUB
SR
SAD + R
NMAK
SP
Slave
SAK
DATA
Master
ST
SAD + W
SUB
SR
SAD + R
MAK
Slave
SAK
DATA
Master
SR
MAK
NMAK
SP
Slave
DATA
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LIS3L02DQ-TR | 功能描述:ACCELEROMETER TRPL AXIS 44QFN RoHS:是 类别:传感器，转换器 >> 加速计 系列:- 标准包装:1 系列:SCA1000 轴:X，Y 加速范围:±1.7g 灵敏度:1.2V/g 电源电压:4.75 V ~ 5.25 V 输出类型:数字 带宽:50±30Hz 接口:SPI 安装类型:表面贴装 封装/外壳:12-SMD 供应商设备封装:12-SMD 其它名称:551-1007-1 |
| LIS3L02DS | 制造商:STMicroelectronics 功能描述: |
| LIS3L06AL | 功能描述:加速计 - 板上安装 3-axis +/-2g/+/-6g MEMS Intertial Sensr RoHS:否 制造商:Murata 传感轴:Double 加速:12 g 灵敏度: 封装 / 箱体: 输出类型:Analog 数字输出 - 位数:11 bit 电源电压-最大:5.25 V 电源电压-最小:4.75 V 电源电流:4 mA 最大工作温度:+ 125 C 最小工作温度:- 40 C |
| LIS3L06AL_06 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:MEMS INERTIAL SENSOR-3-axis - +/-2g/6g ultracompact linear accelerometer |
| LIS3L06ALTR | 功能描述:加速计 - 板上安装 MEMS INERTIAL snsr 3 axis RoHS:否 制造商:Murata 传感轴:Double 加速:12 g 灵敏度: 封装 / 箱体: 输出类型:Analog 数字输出 - 位数:11 bit 电源电压-最大:5.25 V 电源电压-最小:4.75 V 电源电流:4 mA 最大工作温度:+ 125 C 最小工作温度:- 40 C |
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