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参数资料
| 型号： | LLV5256GP |
| 元件分类： | 稳压器 |
| 英文描述： | 0.6 A SWITCHING REGULATOR, 1200 kHz SWITCHING FREQ-MAX, QCC20 |
| 封装： | 3 X 3 MM, VCT-20 |
| 文件页数： | 6/9页 |
| 文件大小： | 142K |
| 代理商： | LLV5256GP |
LV5256GP
No.A1277-6/9
Pin Functions
Pin No.
Pin Name
Description
Equivalent Circuit
1
2
6
NC
No connection. Must be kept open.
3
ONOFF
ON/OFF signal input pin.
Threshold level is TTL level.
Maximum withstand voltage is VDD.
3
VDD
4
VIN
Power supply pin of the IC. Apply the input voltage.
5
DU_SLE
Step-up/down switching pin. The IC goes in step-up mode
by connecting this pin to REG_O pin, and in step-down
mode by connecting this pin to GND or leaving this pin
open. An internal pull-down resistor (200k
) is provided
between DU_SEL and GND pins.
5
VDD
200k
7
PGND
Power ground pin. The source of the output transistor
(Nch-MOSFET) is connected.
8
SW
Switching element. A 0.7
(typ) Nch switch is inserted
between this pin and PGND, and a 0.7
(typ) Pch switch is
connected between this pin and VOUT. In step-down
mode, insert an inductor between the switching node and
power supply output, and in step-up mode insert an
inductor between this pin and power supply input.
8
VOUT
9
VOUT
Source potential of the internal Pch-MOSFET. In
step-down mode, apply the input voltage. In step-up mode,
apply the power supply voltage.
10
VOUT-5
Internal Pch-MOSFET gate suplly voltage generation pin.
Used to generate a voltage with a level equal to VOUT pin
voltage-5V by the internal LDO with OCP.
11
OCP
Overcurrent detection timer setup pin. Connect a capacitor
between this pin and ground to define the time interval
between the beginning of the overcurrent state and the IC
latches off. The capacitor is charged by the 10
A internal
constant current source. If the OCP_SEL pin is kept open
or connected to GND, the IC identifies a short-circuit and
starts the timer counter when the voltage at the IN pin falls
below 0.8 times the voltage of Vref, TRAC_IN or SS,
whichever is lower. If the OCP_SEL pin is connected to
REG_O, the IC compares the voltage at the IN pin with 0.4
times the voltage. When the voltage at this pin goes
beyond 1.25V, the IC latches off. The latch-off state is
reset by the off signal at the ON/OFF pin or the UVLO lock.
11
VIN
500
REG_O
1k
10k
10
A
12
REG_O
3.3V regulator output pin.
12
VIN
50
32k
20k
Continued on next page.
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