参数资料
型号: LM10506TME
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: 电源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PBGA34
封装: 0.40 MM PITCH, MICRO SMD-34
文件页数: 16/34页
文件大小: 1020K
代理商: LM10506TME
30166209
FIGURE 5. PFM vs PWM Operation
19.2.3 PFM Operation (Bucks 1, 2 & 3)
At very light loads, Buck 1, 2 and Buck 3 enter PFM mode and
operate with reduced switching frequency and supply current
to maintain high efficiency.
Buck 1, 2 and 3 will automatically transition into PFM mode
when either of two conditions occurs for a duration of 32 or
more clock cycles:
1.
The inductor current becomes discontinuous, or
2.
The peak PMOS switch current drops below the I
MODE
level.
During PFM operation, the converter positions the output volt-
age slightly higher than the nominal output voltage during
PWM operation, allowing additional headroom for voltage
drop during a load transient from light to heavy load. The PFM
comparators sense the output voltage via the feedback pin
and control the switching of the output FETs such that the
output voltage ramps between 0.8% and 1.6% (typical) above
the nominal PWM output voltage. If the output voltage is be-
low the ‘high’ PFM comparator threshold, the PMOS power
switch is turned on. It remains on until the output voltage ex-
ceeds the ‘high’ PFM threshold or the peak current exceeds
the I
PFM level set for PFM mode.
Once the PMOS power switch is turned off, the NMOS power
switch is turned on until the inductor current ramps to zero.
When the NMOS zero-current condition is detected, the
NMOS power switch is turned off. If the output voltage is be-
low the ‘high’ PFM comparator threshold (see Figure 5), the
PMOS switch is again turned on and the cycle is repeated
until the output reaches the desired level. Once the output
reaches the ‘high’ PFM threshold, the NMOS switch is turned
on briefly to ramp the inductor current to zero and then both
output switches are turned off and the part enters an ex-
tremely low power mode. Quiescent supply current during this
‘idle’ mode is less than 100 A, which allows the part to
achieve high efficiencies under extremely light load condi-
tions. When the output drops below the ‘low’ PFM threshold,
the cycle repeats to restore the output voltage to ~1.6% above
the nominal PWM output voltage.
If the load current should increase during PFM mode causing
the output voltage to fall below the ‘low2’ PFM threshold, the
part will automatically transition into fixed-frequency PWM
mode.
19.2.4 Soft Start
Each of the buck converters has an internal soft-start circuit
that limits the in-rush current during startup. This allows the
converters to gradually reach the steady-state operating
point, thus reducing startup stresses and surges. During start-
up, the switch current limit is increased in steps.
For Buck 1, 2 and 3 the soft start is implemented by increas-
ing the switch current limit in steps that are gradually set
higher. The startup time depends on the output capacitor size,
load current and output voltage. Typical startup time with the
recommended output capacitor of 10 F is 0.2 to 1ms. It is
expected that in the final application the load current condition
will be more likely in the lower load current range during the
start up.
19.2.5 Current Limiting
A current limit feature protects the device and any external
components during overload conditions. In PWM mode the
current limiting is implemented by using an internal compara-
tor that trips at current levels according to the buck capability.
If the output is shorted to ground the device enters a timed
current limit mode where the NFET is turned on for a longer
duration until the inductor current falls below a low threshold,
ensuring inductor current has more time to decay, thereby
preventing runaway.
23
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LM10506
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