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参数资料
| 型号： | LM25066PSQE |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | 电源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, QCC24 |
| 封装： | LLP-24 |
| 文件页数： | 29/48页 |
| 文件大小： | 1456K |
| 代理商： | LM25066PSQE |
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TABLE 28. GATE_MASK Register
Bit
NAME
Default
7
Not used, always 0
0
6
Not used, always 0
0
5
VIN UV FAULT
0
4
VIN OV FAULT
0
3
IIN/PFET FAULT
0
2
OVERTEMP FAULT
0
1
Not used, always 0
0
CIRCUIT BREAKER
FAULT
0
The IIN/PFET Fault refers to the input current fault and the
MOSFET power dissipation fault. There is no input power fault
detection, only input power warning detection.
MFR_SPECIFIC_08: ALERT_MASK (D8h)
The ALERT_MASK is used to mask the SMBA when a spe-
cific fault or warning has occurred. Each bit corresponds to
one of the 14 different analog and digital faults or warnings
that would normally result in an SMBA being set. When the
corresponding bit is high, that condition will not cause the
SMBA to be asserted. If that condition occurs, the registers
where that condition is captured will still be updated (STATUS
registers, DIAGNOSTIC_WORD) and the external MOSFET
gate
control
will
still
be
active
(VIN_OV_FAULT,
VIN_UV_FAULT,
IIN/PFET_FAULT,
CB_FAULT,
OT_FAULT). This register is accessed with the PMBus
Read / Write Word protocol. The VIN UNDERVOLTGE
FAULT flag will default to 1 on startup. However, it will be
cleared to 0 after the first time the input voltage exceeds the
resistor programmed UVLO threshold.
TABLE 29. ALERT_MASK Definitions
BIT
NAME
DEFAULT
15
VOUT UNDERVOLTAGE WARN
0
14
IIN LIMIT Warn
0
13
VIN UNDERVOLTAGE WARN
0
12
VIN OVERVOLTAGE WARN
0
11
POWER GOOD
1
10
OVERTEMP WARN
0
9
Not Used
0
8
OVERPOWER LIMIT WARN
0
7
Not Used
0
6
EXT_MOSFET_SHORTED
0
5
VIN UNDERVOLTAGE FAULT
1
4
VIN OVERVOLTAGE FAULT
0
3
IIN/PFET FAULT
0
2
OVERTEMPERATURE FAULT
0
1
CML FAULT (Communications Fault)
0
CIRCUIT BREAKER FAULT
0
MFR_SPECIFIC_09: DEVICE_SETUP (D9h)
The DEVICE_SETUP command may be used to override pin
settings to define operation of the LM25066 under host con-
trol. This command is accessed with the PMBus read / write
byte protocol.
TABLE 30. DEVICE_SETUP Byte Format
Bit
Name
Meaning
7:5
Retry setting
111 = Unlimited retries
110 = Retry 16 times
101 = Retry 8 times
100 = Retry 4 times
011 = Retry 2 times
010 = Retry 1 time
001 = No retries
000 = Pin configured retries
4
Current limit setting
0 = Low setting (25mV)
1 = High setting (46mV)
Bit
Name
Meaning
3
CB/CL Ratio
0 = Low setting (1.8x)
1 = High setting (3.6x)
2
Current limit
Configuration
0 = Use pin settings
1 = Use SMBus settings
1
Circuit breaker
Configuration
0 = Use pin settings
1 = Use SMBus settings
0
Unused
In order to configure the Current Limit Setting via this register,
it is necessary to set the Current Limit Configuration bit (2) to
1 to enable the register to control the current limit function and
the Current Limit Setting bit (4) to select the desired setting.
Similarly, in order to control the Circuit Breaker via this regis-
ter, it is necessary to set the Circuit Breaker Configuration bit
(1) to 1 to enable the register to control the Circuit Breaker
Setting, and the Circuit Breaker / Current Limit Ratio bit (3) to
the desired value. If the respective Configuration bits are not
set, the Settings will be ignored and the pin set values used.
The Current Limit Configuration effects the coefficients used
for the Current and Power measurements and warning reg-
isters.
35
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LM25066
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