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参数资料
| 型号： | LM3102TL-1/NOPB |
| 厂商： | National Semiconductor |
| 文件页数： | 3/24页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 2.5A 28USMD |
| 标准包装： | 1 |
| 系列： | PowerWise®, SIMPLE SWITCHER® |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 7 V |
| 输入电压： | 4.5 V ~ 42 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1MHz |
| 电流 - 输出： | 2.5A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-WFBGA |
| 包装： | 标准包装 |
| 供应商设备封装： | 28-uSMD |
| 其它名称： | LM3102TL-1/NOPBDKR |
PIN DESCRIPTIONS
SNVS515G – SEPTEMBER 2007 – REVISED JANUARY 2012
Pin
1,9,10,12,19,2
Ball
Name
N/C
Description
No Connection
Application Information
These pins must be left unconnected.
0
2, 3
A2, A3, B2,
SW
Switching Node
Internally connected to the source of the main
B3, C2, C3,
D2, D3, D4
MOSFET and the drain of the Synchronous
MOSFET. Connect to the inductor.
4, 5
A4, B4
VIN
Input supply voltage
Supply pin to the device. Nominal input range is
4.5V to 42V.
6
C4
BST
Connection for bootstrap capacitor
Connect a 33 nF capacitor from the SW pin to this
pin. An internal diode charges the capacitor during
the main MOSFET off-time.
7
E3, E4, F1,
AGND
Analog Ground
Ground for all internal circuitry other than the
F2, F3, G3
PGND pin.
8
G2
SS
Soft-start
An 8 μA internal current source charges an
external capacitor to provide the soft- start function.
11
GND
Ground
Must be connected to the AGND pin for normal
operation. The GND and AGND pins are not
internally connected.
13
G1
FB
Feedback
Internally connected to the regulation and over-
voltage comparators. The regulation setting is 0.8V
at this pin. Connect to feedback resistors.
14
G4
EN
Enable
Connect a voltage higher than 1.26V to enable the
regulator. Leaving this input open circuit will enable
the device at internal UVLO level.
15
F4
RON
On-time Control
An external resistor from the VIN pin to this pin
sets the main MOSFET on-time.
16
E1, E2
VCC
Start-up regulator Output
Nominally regulated to 6V. Connect a capacitor of
not less than 680 nF between the VCC and AGND
pins for stable operation.
17, 18
A1, B1, C1,
PGND
Power Ground
Synchronous MOSFET source connection. Tie to a
D1
ground plane.
EP
EP
Exposed Pad
Thermal connection pad. Connect to the ground
plane.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Copyright ? 2007–2012, Texas Instruments Incorporated
Product Folder Links: LM3102
3
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