参数资料
型号: LM3423BBLSCSEV/NOPB
厂商: National Semiconductor
文件页数: 23/67页
文件大小: 0K
描述: BOARD EVAL BUCK BOOST LM3423
标准包装: 1
系列: PowerWise®
电流 - 输出 / 通道: 700mA
输出及类型: 1,非隔离
输入电压: 10 ~ 70 V
已供物品: 板,文档
已用 IC / 零件: LM3423
LM3421/23
100
k :
10V
R SNS
SNVS574E – JULY 2008 – REVISED MAY 2013
Q2
100 nF
DDRV
Figure 31. Buck Level-Shifted PWM Circuit
V O
LM3421/23
R SNS
DPOL
10V
100
k :
Q2
V CC
Q6
100 pF
10 k :
DDRV
Figure 32. Boost Level-Shifted PWM Circuit
LM3423 ONLY: DPOL, FLT, TIMR, and LRDY
The LM3423 has four additional pins: DPOL, FLT, TIMR, and LRDY. The DPOL pin is simply used to invert the
DDRV polarity . If DPOL is left open, then it is internally pulled high and the polarity is correct for driving a series
N-channel dimFET. If DPOL is pulled low then the polarity is correct for using a series P-channel dimFET in high-
side dimming applications. For a parallel P-channel dimFET, as used in the buck topology, leave DPOL open for
proper polarity.
Among the LM3423's other additional pins are TIMR and FLT which can be used in conjunction with an input
disconnect MosFET switch as shown in Figure 33 to protect the module from various fault conditions.
A fault is detected and an 11.5 μA (typical) current is sourced from the TIMR pin whenever any of the following
conditions exist:
1. LED current is above regulation by more than 30%.
2. OVLO has engaged.
3. Thermal shutdown has engaged.
An external capacitor (C TMR ) from TIMR to AGND programs the fault filter time as follows:
C TMR =
t FLT x 11.5 P A
1.24 V
(33)
When the voltage on the TIMR pin reaches 1.24V, the device is latched off and the N-channel MosFET open
drain FLT pin transitions to a high impedance state. The TIMR pin will be immediately pulled to ground (reset) if
the fault condition is removed at any point during the filter period. Otherwise, if the timer expires, the fault will
remain latched until one of three things occurs:
Copyright ? 2008–2013, Texas Instruments Incorporated
23
Product Folder Links: LM3421 LM3421-Q1 LM3423 LM3423-Q1
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