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| 型号： | LM5025CSDX |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | 稳压器 |
| 英文描述： | SWITCHING CONTROLLER, DSO16 |
| 封装： | LLP-16 |
| 文件页数： | 2/16页 |
| 文件大小： | 362K |
| 代理商： | LM5025CSDX |
30058912
FIGURE 1.
Compound Gate Drivers
The LM5025C contains two unique compound gate drivers,
which parallel both MOS and Bipolar devices to provide high
drive current throughout the entire switching event. The Bipo-
lar device provides most of the drive current capability and
provides a relatively constant sink current which is ideal for
driving large power MOSFETs. As the switching event nears
conclusion and the Bipolar device saturates, the internal MOS
device continues to provide a low impedance to compete the
switching event.
During turn-off at the Miller plateau region, typically around
2V - 3V, is where gate driver current capability is needed
most. The resistive characteristics of all MOS gate drivers are
adequate for turn-on since the supply to output voltage dif-
ferential is fairly large at the Miller region. During turn-off
however, the voltage differential is small and the current
source characteristic of the Bipolar gate driver is beneficial to
provide fast drive capability.
30058913
PWM Comparator
The PWM comparator compares the ramp signal (RAMP) to
the loop error signal (COMP). This comparator is optimized
for speed in order to achieve minimum controllable duty cy-
cles. The internal 5k
pull-up resistor, connected between
the internal 5V reference and COMP, can be used as the pull-
up for an optocoupler. The comparator polarity is such that
0V on the COMP pin will produce a zero duty cycle on both
gate driver outputs.
Volt Second Clamp
The Volt x Second Clamp comparator compares the ramp
signal (RAMP) to a fixed 2.5V reference. By proper selection
of RFF and CFF, the maximum ON time of the main switch
can be set to the desired duration. The ON time set by Volt x
Second Clamp varies inversely with the line voltage because
the RAMP capacitor is charged by a resistor connected to Vin
while the threshold of the clamp is a fixed voltage (2.5V). An
example will illustrate the use of the Volt x Second Clamp
comparator to achieve a 50% duty cycle limit, at 200 kHz, at
a 48V line input: A 50% duty cycle at a 200 kHz requires a 2.5
s of ON time. At 48V input the Volt x Second product is 120V
x s (48V x 2.5s). To achieve this clamp level:
R
FF x CFF = VIN x TON / 2.5V
48 x 2.5 / 2.5 = 48
Select C
FF = 470 pF
R
FF = 102k
The recommended capacitor value range for CFF is 100 pF
to 1000 pF.
The C
FF ramp capacitor is discharged at the conclusion of
every cycle by an internal discharge switch controlled by ei-
ther the internal clock or by the V x S Clamp comparator,
whichever event occurs first.
Current Limit
The LM5025C contains two modes of over-current protection.
If the sense voltage at the CS1 input exceeds 0.5V the present
power cycle is terminated (cycle-by-cycle current limit). If the
sense voltage at the CS2 input exceeds 0.5V, the controller
will terminate the present cycle, discharge the softstart ca-
pacitor and reduce the softstart current source to 1 A. The
softstart (SS) capacitor is released after being fully dis-
charged and slowly charges with a 1 A current source. When
the voltage at the SS pin reaches approximately 1V, the PWM
comparator will produce the first output pulse at OUT_A. After
the first pulse occurs, the softstart current source will revert
to the normal 90 A level. Fully discharging and then slowly
www.national.com
10
LM5025C
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