参数资料
型号: LM75BIM-5/NOPB
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: Switch/Digital Output Temperature Sensor
英文描述: DIGITAL TEMP SENSOR-SERIAL, 9BIT(s), 3Cel, RECTANGULAR, SURFACE MOUNT
封装: 0.150 INCH, SOP-8
文件页数: 3/18页
文件大小: 474K
代理商: LM75BIM-5/NOPB
1.9 O.S. POLARITY
The O.S. output can be programmed via the configuration
register to be either active low (default mode), or active high.
In active low mode the O.S. output goes low when triggered
exactly as shown on the O.S. Output Temperature Response
Diagram, Figure 4. Active high simply inverts the polarity of
the O.S. output.
1.10 INTERNAL REGISTER STRUCTURE
1265808
There are four data registers in the LM75B and LM75C, and
an additional Product ID register in the LM75A, selected by
the Pointer register. At power-up the Pointer is set to “000”;
the location for the Temperature Register. The Pointer regis-
ter latches whatever the last location it was set to. In Interrupt
Mode, a read from the LM75, or placing the device in shut-
down mode, resets the O.S. output. All registers are read and
write, except the Temperature register and the LM75A's Prod-
uct ID register, which are read only.
A write to the LM75 will always include the address byte and
the Pointer byte. A write to the Configuration register requires
one data byte, and the T
OS and THYST registers require two
data bytes.
Reading the LM75 can take place either of two ways: If the
location latched in the Pointer is correct (most of the time it is
expected that the Pointer will point to the Temperature regis-
ter because it will be the data most frequently read from the
LM75), then the read can simply consist of an address byte,
followed by retrieving the corresponding number of data
bytes. If the Pointer needs to be set, then an address byte,
pointer byte, repeat start, and another address byte will ac-
complish a read.
The first data byte is the most significant byte with most sig-
nificant bit first, permitting only as much data as necessary to
be read to determine temperature condition. For instance, if
the first four bits of the temperature data indicates an overtem-
perature condition, the host processor could immediately take
action to remedy the excessive temperatures. At the end of a
read, the LM75 can accept either Acknowledge or No Ac-
knowledge from the Master (No Acknowledge is typically
used as a signal for the slave that the Master has read its last
byte).
An inadvertent 8-bit read from a 16-bit register, with the D7
bit low, can cause the LM75 to stop in a state where the SDA
line is held low as shown in Figure 5. This can prevent any
further bus communication until at least 9 additional clock cy-
cles have occurred. Alternatively, the master can issue clock
cycles until SDA goes high, at which time issuing a “Stop”
condition will reset the LM75.
1265809
FIGURE 5. Inadvertent 8-Bit Read from 16-Bit Register where D7 is Zero (“0”)
11
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LM75
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