参数资料
型号: LM80CIMTX-32
厂商: National Semiconductor Corporation
英文描述: Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor
中文描述: 串行接口ACPI的兼容微处理器系统硬件监视器
文件页数: 16/29页
文件大小: 412K
代理商: LM80CIMTX-32
Functional Description (Continued)
12.3 Configuration Register — Address 00h
Power on default <7:0> = 00001000 binary
Bit
Name
Read/
Write
Description
0
Start
Read/Write
A one enables startup of monitoring operations, a zero puts the part in standby mode.
Note: The outputs of Interrupt pins will not be cleared if the user writes a zero to this
location after an interrupt has occurred unlike “INT_Clear” bit.At start up, limit checking
functions and scanning begin. Note, all limits should be set in the Value RAM before
setting this bit HIGH.
1
INT Enable
Read/Write
A one enables the INT Interrupt output.
2
INT polarity
select
Read/Write
A one selects an active high open source output while a zero selects an active low
open drain output.
3
INT_Clear
Read/Write
A one disables the INT and RST_OUT/OS outputs without affecting the contents of
Interrupt Status Registers. The device will stop monitoring. It will resume upon clearing
of this bit.
4
RESET
Read/Write
A one outputs at least a 10 ms active low reset signal at RESET, if <7> = 1 and
<6> = 0 in the Fan Divisor/RST_OUT/OS Register. This bit is cleared once the pulse
has gone inactive.
5
Chassis Clear
Read/Write
A one clears the CI (Chassis Intrusion) pin. This bit clears itself after the CI pins
cleared.
6
GPO
Read/Write
A one in this bit drives a one on GPO (General Purpose Output) pin.
7
INITIALIZATION
Read/Write
A one restores power on default value to the Configuration Register, Interrupt Status
Registers, Interrupt Mask Registers, Fan Divisor/RST_OUT/OSRegister, and the OS
Configuration/Temperature Resolution Register. This bit clears itself since the power
on default is zero.
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