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| 型号： | LM80CIMTX-32 |
| 厂商： | National Semiconductor Corporation |
| 英文描述： | Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor |
| 中文描述： | 串行接口ACPI的兼容微处理器系统硬件监视器 |
| 文件页数： | 4/29页 |
| 文件大小： | 412K |
| 代理商： | LM80CIMTX-32 |
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Functional Description (Continued)
3.0 USING THE LM80
3.1 Power On
When power is first applied, the LM80 performs a “power on
reset” on several of its registers. The power on condition of
registers is shown in
Table 1. Registers whose power on val-
ues are not shown have power on conditions that are inde-
terminate (this includes the value RAM and WATCHDOG
limits). The ADC is inactive. In most applications, usually the
first action after power on would be to write WATCHDOG lim-
its into the Value RAM.
3.2 Resets
Configuration Register INITIALIZATION accomplishes the
same function as power on reset. The Value RAM conver-
sion results, and Value RAM WATCHDOG limits are not Re-
set and will be indeterminate immediately after power on. If
the Value RAM contains valid conversion results and/or
Value RAM WATCHDOG limits have been previously set,
they will not be affected by a Configuration Register INITIAL-
IZATION. Power on reset, or Configuration Register INITIAL-
IZATION, clear or initialize the following registers (the initial-
ized values are shown in
Table 1):
Configuration Register
Interrupt Status Register 1
Interrupt Status Register 2
Interrupt Mask Register 1
Interrupt Mask Register 2
Fan Divisor/RST_OUT/OS Register
OS Configuration/Temperature Resolution Register
Value Ram (Registers at Address 20h - 3Fh, which include:
Temperature reading, IN0-IN6 readings, FAN1 and FAN2
readings, and WATCHDOG limits)
Configuration Register INITIALIZATION is accomplished by
setting Bit 7 of the Configuration Register high. This Bit auto-
matically clears after being set.
The LM80 can be reset to it’s “power on state” by taking
NTEST_IN/Reset_IN pin low for at least 50 ns.
3.3 Using the Configuration Register
The Configuration Register provides all control over the
LM80. At power on, the ADC is stopped and INT_Clear is as-
serted, clearing the INT and RST_OUT/OS hardwire out-
puts. The Configuration Register starts and stops the LM80,
enables and disables INT outputs, clears and sets CI and
GPO I/O pins, initiates reset pulse on RST_OUT/OS pin, and
provides the Reset function described in
Section 3.2.
Bit 0 of the Configuration Register controls the monitoring
loop of the LM80. Setting Bit 0 low stops the LM80 monitor-
ing loop and puts the LM80 in shutdown mode, reducing
power consumption. Serial Bus communication is possible
with any register in the LM80 although activity on these lines
will increase shutdown current, up to as much as maximum
rated supply current, while the activity takes place. Taking Bit
0 high starts the monitoring loop, described in more detail
subsequently.
Bit 1 of the Configuration Register enables the INT Interrupt
hardwire output when this bit is taken high.
Bit 2 of the Configuration Register defines whether the INT
pin is open source or open drain.
Bit 3 clears the INT output when taken high. The LM80 moni-
toring function will stop until bit 3 is taken low. The content of
the Interrupt (INT) Status Registers will not be affected.
Bit4, when taken high, will initiate a 10 ms RESET signal on
the RST_OUT/OS output (when this pin is in the RST mode).
When bit 5 is taken high the CI (Chassis Intrusion) pin is re-
set.
Bit 6 of the configuration register sets or clears the GPO out-
put. This pin can be used in software power control by acti-
vating an external power control MOSFET.
3.4 Starting Conversions
3.4 STARTING CONVERSION The monitoring function
(Analog inputs, temperature, and fan speeds) in the LM80 is
started by writing to the Configuration Register and setting
INT_Clear (Bit 3), low, and Start (Bit 0), high. The LM80 then
performs a round-robin monitoring of all analog inputs, tem-
perature, and fan speed inputs approximately once a sec-
ond. If the temperature resolution is set to 12 bits one com-
plete monitoring function will take approximately 2 seconds.
The sequence of items being monitored corresponds to loca-
tions in the Value RAM (except for the Temperature reading)
and is:
1.
Temperature
2.
IN0
3.
IN1
4.
IN2
5.
IN3
6.
IN4
7.
IN5
8.
IN6
9.
Fan 1
10. Fan 2
3.5 Reading Conversion Results
The conversion results are available in the Value RAM. Con-
versions can be read at any time and will provide the result
of the last conversion. Because the ADC stops, and starts a
new conversion whenever the conversion is read, reads of
any single value should not be done more often than once
every 120 ms. When reading all values with the temperature
resolution set to 9-bits, allow at least 1.5 seconds between
reading groups of values. Reading more frequently than
once every 1.5 seconds can also prevent complete updates
of Interrupt Status Registers and Interrupt Outputs. If the
temperature resolution is set to 12-bit, allow at least 2.0 sec-
onds between reading groups of values.
A typical sequence of events upon power on of the LM80
would consist of:
1.
Set WATCHDOG Limits
2.
Set Interrupt Masks
3.
Start the LM80 monitoring process
4.0 ANALOG INPUTS
The 8-bit ADC has a 10 mV LSB, yielding a 0V to 2.55V
(2.56 - 1LSB) input range. This is true for all analog inputs. In
PC monitoring applications these inputs would most often be
connected to power supplies. The 2.5, 3.3, ± 5 and ± 12 volt
inputs should be attenuated with external resistors to any de-
sired value within the input range. Care should be taken not
to exceed the power supply voltage (V
+) at any time.
www.national.com
12
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