参数资料
型号: LM95241EB
厂商: National Semiconductor
文件页数: 13/29页
文件大小: 0K
描述: BOARD EVALUATION LM95241
标准包装: 1
系列: PowerWise®, TruTherm®
传感器类型: 温度
传感范围: 0°C ~ 140°C
接口: SMBus(2 线/I²C)
灵敏度: ±1°C
电源电压: 3 V ~ 3.6 V
嵌入式:
已供物品:
已用 IC / 零件: LM95241
相关产品: LM95241CIMMX-ND - IC TEMP SENSOR DUAL REMOTE 8MSOP
LM95241CIMMX-2-ND - IC TEMP SENSOR DUAL REMOTE 8MSOP
LM95241CIMMX-1-ND - IC TEMP SENSOR DUAL REMOTE 8MSOP
LM95241CIMM-2DKR-ND - IC TEMP SENS DUAL REM DIO 8-MSOP
LM95241CIMM/NOPBDKR-ND - IC TEMP SENS DUAL REM DIO 8-MSOP
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LM95241CIMM-2TR-ND - IC TEMP SENS DUAL REM DIO 8-MSOP
LM95241CIMM/NOPBTR-ND - IC TEMP SENS DUAL REM DIO 8-MSOP
LM95241CIMM-1DKR-ND - IC TEMP SENSOR REMOTE DL 8-MSOP
更多...
SNIS143E – AUGUST 2006 – REVISED MARCH 2013
A Write to the LM95241 will always include the address byte and the command byte. A write to any register
requires one data byte.
Reading the LM95241 can take place either of two ways:
1. If the location latched in the Command Register is correct (most of the time it is expected that the Command
Register will point to one of the Read Temperature Registers because that will be the data most frequently
read from the LM95241), then the read can simply consist of an address byte, followed by retrieving the data
byte.
2. If the Command Register needs to be set, then an address byte, command byte, repeat start, and another
address byte will accomplish a read.
The data byte has the most significant bit first. At the end of a read, the LM95241 can accept either acknowledge
or No Acknowledge from the Master (No Acknowledge is typically used as a signal for the slave that the Master
has read its last byte). When retrieving all 11 bits from a previous remote diode temperature measurement, the
master must insure that all 11 bits are from the same temperature conversion. This may be achieved by reading
the MSB register first. The LSB will be locked after the MSB is read. The LSB will be unlocked after being read. If
the user reads MSBs consecutively, each time the MSB is read, the LSB associated with that temperature will be
locked in and override the previous LSB value locked-in.
SMBus Timing Diagrams for Access of Data
1
9
1
9
SMBCLK
SMBDAT
A6
A5
A4
A3
A2
A1
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
Start by
Master
Frame 1
Serial Bus Address Byte
Ack
by
LM95241
Frame 2
Command Byte
Ack by
LM95241
Stop
by
Master
Figure 8. Serial Bus Write to the Internal Command Register
1
9
1
9
SMBCLK
SMBDAT
A6
A5
A4
A3
A2
A1
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
Start by
Master
Frame 1
Serial Bus Address Byte
Ack
by
LM95241
Frame 2
Command Byte
Ack
by
LM95241
SMBCLK
(Continued)
1
9
SMBDAT
(Continued)
D7
D6
D5
D4
D3
D2
D1
D0
Ack by
LM95241
Stop
by
Master
Frame 3
Data Byte
Figure 9. Serial Bus Write to the internal Command Register followed by a Data Byte
Copyright ? 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM95241
13
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