参数资料
型号: LMH6715MAXEP
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: 音频/视频放大
英文描述: 1 CHANNEL, VIDEO AMPLIFIER, PDSO8
封装: PLASTIC, SOIC-8
文件页数: 2/13页
文件大小: 489K
代理商: LMH6715MAXEP
Application Introduction (Continued)
R
F vs. Non-Inverting Gain
20088521
Both plots show the value of R
F approaching a minimum
value (dashed line) at high gains. Reducing the feedback
resistor below this value will result in instability and possibly
oscillation. The recommended value of R
F is depicted by the
solid line, which begins to increase at higher gains. The
reason that a higher R
F is required at higher gains is the
need to keep R
G from decreasing too far below the output
impedance of the input buffer. For the LMH6715EP the
output resistance of the input buffer is approximately 160
and 50
is a practical lower limit for R
G. Due to the limita-
tions on R
G the LMH6715EP begins to operate in a gain
bandwidth limited fashion for gains of ±5V/V or greater.
R
F vs. Inverting Gain
20088522
When using the LMH6715EP as a replacement for the
CLC412, identical bandwidth can be obtained by using an
appropriate value of R
F . The chart “Frequency Response
vs. R
F” shows that an RF of approximately 700
will provide
bandwidth very close to that of the CLC412. At other gains a
similar increase in R
F can be used to match the new and old
parts.
CIRCUIT LAYOUT
With all high frequency devices, board layouts with stray
capacitances have a strong influence over AC performance.
The LMH6715EP is no exception and its input and output
pins are particularly sensitive to the coupling of parasitic
capacitances (to AC ground) arising from traces or pads
placed too closely (<0.1”) to power or ground planes. In
some cases, due to the frequency response peaking caused
by these parasitics, a small adjustment of the feedback
resistor value will serve to compensate the frequency re-
sponse. Also, it is very important to keep the parasitic ca-
pacitance across the feedback resistor to an absolute mini-
mum.
The performance plots in the data sheet can be reproduced
using the evaluation boards available from National. The
CLC730036 board uses all SMT parts for the evaluation of
the LMH6715EP. The board can serve as an example layout
for the final production printed circuit board.
Care must also be taken with the LMH6715EP’s layout in
order to achieve the best circuit performance, particularly
channel-to-channel isolation. The decoupling capacitors
(both tantalum and ceramic) must be chosen with good high
frequency characteristics to decouple the power supplies
and the physical placement of the LMH6715EP’s external
components is critical. Grouping each amplifier’s external
components with their own ground connection and separat-
ing them from the external components of the opposing
channel with the maximum possible distance is recom-
mended. The input (R
IN) and gain setting resistors (RF) are
the most critical. It is also recommended that the ceramic
decoupling capacitor (0.1F chip or radial-leaded with low
ESR) should be placed as closely to the power pins as
possible.
POWER DISSIPATION
Follow these steps to determine the Maximum power dissi-
pation for the LMH6715EP:
1. Calculate the quiescent (no-load) power: P
AMP =ICC (VCC
-V
EE)
2. Calculate the RMS power at the output stage: P
O =(VCC
-V
LOAD)(ILOAD), where VLOAD and ILOAD are the voltage and
current across the external load.
3. Calculate the total RMS power: Pt = P
AMP +PO
The maximum power that the LMH6715EP, package can
dissipate at a given temperature can be derived with the
following equation:
Pmax = (150o - Tamb)/
θ
JA, where Tamb = Ambient tempera-
ture (C) and
θ
JA = Thermal resistance, from junction to
ambient, for a given package (C/W). For the SOIC package
θ
JA is 145C/W.
MATCHING PERFORMANCE
With proper board layout, the AC performance match be-
tween the two LMH6715EP’s amplifiers can be tightly con-
trolled as shown in Typical Performance plot labeled “Small-
Signal Channel Matching”.
The measurements were performed with SMT components
using a feedback resistor of 300
at a gain of +2V/V.
The LMH6715EP’s amplifiers, built on the same die, provide
the advantage of having tightly matched DC characteristics.
SLEW RATE AND SETTLING TIME
One of the advantages of current-feedback topology is an
inherently high slew rate which produces a wider full power
bandwidth. The LMH6715EP has a typical slew rate of
1300V/s. The required slew rate for a design can be calcu-
lated by the following equation: SR = 2
πfV
pk.
LMH6715EP
Enhanced
Plastic
www.national.com
10
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