参数资料
型号: LMH6734MQX/NOPB
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: 音频/视频放大
英文描述: 3 CHANNEL, VIDEO AMPLIFIER, PDSO16
封装: ROHS COMPLIANT, SSOP-16
文件页数: 4/18页
文件大小: 561K
代理商: LMH6734MQX/NOPB
Application Information
GENERAL INFORMATION
The LMH6734 is a high speed current feedback selectable
gain buffer (SGB), optimized for very high speed applications.
With its internal feedback and gain-setting resistors,
R
F = RG = 327, the LMH6734 offers excellent AC perfor-
mance while simplifying board layout and minimizing the
effects of layout related parasitic components. The LMH6734
has no internal ground reference so single or split supply con-
figurations are both equally useful.
SETTING THE CLOSED LOOP GAIN
The LMH6734 can be configured with gain settings of
A
V = +2, +1, or 1. Table 1, shows the non-inverting and in-
verting pin connections to achieve the desired closed loop
gain.
Table 1. Setting the Closed Loop
Gain
GAIN A
V
INPUT CONNECTIONS
Non-Inverting
Inverting
1 V/V
Ground
Input Signal
+1 V/V
Input Signal
NC (Open)
+2 V/V
Input Signal
Ground
SPLIT SUPPLY APPLICATION
The recommended split supply circuit applications are shown
in Figure 1, Figure 2 , and Figure 3. In all three configurations
the input signal is DC coupled with a termination resister input
R
IN = 50. In Figure 1 the inverting input is connected to
ground completing the internal feedback loop to set the gain
to +2 V/V. In Figure 2 the inverting input is open (no-connect),
thus providing a buffer configuration of +1 V/V. Figure 3
shows a buffer configuration with a gain of 1 V/V. In this
configuration an input resistor of 59
was used to balance the
internal R
G resistor of 327 and to provide a 50 termination.
30003605
FIGURE 1. Recommended Split Supply Non-Inverting
Gain Circuit, Gain = +2 V/V
30003608
FIGURE 2. Recommended Split Supply Non-Inverting
Gain Circuit, Gain +1 V/V
30003603
FIGURE 3. Recommended Split Supply Inverting Gain
Circuit, Gain = –1 V/V
SINGLE SUPPLY APPLICATION
The LMH6734 can also be configured for single supply appli-
cations as shown in Figure 4, Figure 5, and Figure 6. In Figure
4, the 220
μF capacitor was chosen to satisfy low frequency
input signals and to provide an open for the internal feedback
network path, thus setting the gain to +1 V/V. With an AC sig-
nal present, this 220
μF capacitor is shunted to ground and
completes the feedback resistor network to set the AC cou-
pled gain of +2 V/V. The input is AC coupled with the 22
μF
capacitor and the two 4.7 k
resistors to set the input DC bias
voltage. Figure 5 shows the single supply buffer configuration
with the inverting input open (no-connect) creating an open to
the internal feedback network giving a gain of +1 V/V. The
input voltage is AC coupled with the 22
μF capacitor along
with two 4.7 k
resistors to set the input DC bias voltage.
Figure 6 shows the single supply buffer configuration for a
gain of 1 V/V. In this circuit, the input signal is DC coupled
into the inverting input closing the internal feedback network
and creating a gain of 1 V/V while an AC gain of +2 V/V is
present at the non-inverting input. Thus, the 6.8 k
and the
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LMH6734
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