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参数资料
| 型号： | LMK04002BISQE/NOPB |
| 厂商： | National Semiconductor |
| 文件页数： | 42/65页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK COND 1.6GHZ W/PLL 48LLP |
| 标准包装： | 1 |
| 系列： | PowerWise® |
| 类型： | 时钟调节器 |
| PLL： | 是 |
| 输入： | LVCMOS |
| 输出： | LVCMOS，2VPECL，LVPECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 2:7 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 1.75GHz |
| 除法器/乘法器： | 是/是 |
| 电源电压： | 3.15 V ~ 3.45 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-WFQFN 裸露焊盘 |
| 供应商设备封装： | 48-LLP（7x7） |
| 包装： | 标准包装 |
| 产品目录页面： | 1275 (CN2011-ZH PDF) |
| 其它名称： | LMK04002BISQEDKR |
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0.33 mm, typ
1.2 mm, typ
5.0 mm, min
SNOSAZ8J – SEPTEMBER 2008 – REVISED SEPTEMBER 2011
Power Supply Conditioning
The recommended technique for power supply management is to connect the power pins for the clock outputs
(pins 13, 37, 40, 43, and 46) to a dedicated power plane and connect all other power pins on the device (pins 3,
8, 18, 19, 22, 24, 30, 31, and 33) to a second power plane. Note: the LMK04000 family has internal voltage
regulators for the PLL and VCO blocks to provide noise immunity.
Thermal Management
Power consumption of the LMK04000 family of devices can be high enough to require attention to thermal
management. For reliability and performance reasons the die temperature should be limited to a maximum of
125 °C. That is, as an estimate, TA (ambient temperature) plus device power consumption times θJA should not
exceed 125 °C.
The package of the device has an exposed pad that provides the primary heat removal path as well as excellent
electrical grounding to a printed circuit board. To maximize the removal of heat from the package a thermal land
pattern including multiple vias to a ground plane must be incorporated on the PCB within the footprint of the
package. The exposed pad must be soldered down to ensure adequate heat conduction out of the package. A
recommended land and via pattern is shown in Figure 15. More information on soldering WQFN packages can
be obtained: http://www.national.com/analog/packaging/.
Figure 15. Recommended Land and Via Pattern
To minimize junction temperature it is recommended that a simple heat sink be built into the PCB (if the ground
plane layer is not exposed). This is done by including a copper area of about 2 square inches on the opposite
side of the PCB from the device. This copper area may be plated or solder coated to prevent corrosion but
should not have conformal coating (if possible), which could provide thermal insulation. The vias shown in
Figure 15 should connect these top and bottom copper layers and to the ground layer. These vias act as “heat
pipes” to carry the thermal energy away from the device side of the board to where it can be more effectively
dissipated.
Copyright 2008–2011, Texas Instruments Incorporated
47
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LMK04002BISQX | 制造商:NSC 制造商全称:National Semiconductor 功能描述:Low-Noise Clock Jitter Cleaner with Cascaded PLLs |
| LMK04002BISQX/NOPB | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| LMK04010BISQ | 制造商:NSC 制造商全称:National Semiconductor 功能描述:Low-Noise Clock Jitter Cleaner with Cascaded PLLs |
| LMK04010BISQ/NOPB | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| LMK04010BISQE | 制造商:NSC 制造商全称:National Semiconductor 功能描述:Low-Noise Clock Jitter Cleaner with Cascaded PLLs |
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