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参数资料
| 型号： | LMX2335USLB |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 1200 MHz, PQCC16 |
| 封装： | PLASTIC, CSP-16 |
| 文件页数： | 3/20页 |
| 文件大小： | 379K |
| 代理商： | LMX2335USLB |
Functional Description (Continued)
TABLE 3. The F
oLD Output Truth Table
RF1 R[19]
RF2 R[19]
RF1 R[20]
RF2 R[20]
F
oLD
(RF1 LD)
(RF2 LD)
(RF1 F
O)
(RF2 F
O)
Output State
0000
Disabled (Note 11)
0100
RF2 Lock Detect (Note 12)
1000
RF1 Lock Detect (Note 12)
1100
RF1/RF2 Lock Detect (Note 12)
X
0
1
RF2 Reference Divider Output
X
0
1
0
RF1 Reference Divider Output
X
1
0
1
RF2 Programmable Divider Output
X
1
0
RF1 Programmable Divider Output
0011
Fastlock (Note 13)
0111
RF2 Counter Reset (Note 14)
1011
RF1 Counter Reset (Note 14)
1111
RF1 and RF2 Counter Reset (Note 14)
X — don’t care condition
Note 11: When the FoLD output is disabled it is actively pulled to a low logic state.
Note 12: Lock detect output provided to indicate when the VCO frequency is in “lock”. When the loop is locked and a lock detect mode is selected, the pins output
is HIGH, with narrow pulses LOW. In the RF1/RF2 lock detect mode a locked condition is indicated when RF2 and RF1 are both locked.
Note 13: The Fastlock mode utilized the FoLD output pin to switch a second loop filter damping resistor to ground during fastlock operation. Activation of Fastlock
occurs whenever the RF loop’s Icpo magnitude bit #17 is selected HIGH (while the #19 and #20 mode bits are set for Fastlock).
Note 14: The RF2 counter reset mode resets RF2 PLL’s R and N counters and brings RF2 charge pump output to a TRI-STATE condition. The RF1 counter reset
mode resets RF1 PLL’s R and N counters and brings RF1 charge pump output to a TRI-STATE condition. The RF1 and RF2 counter reset mode resets all counters
and brings both charge pump output to a TRI-STATE condition. Upon removal of the Reset bits the N counter resumes counting in “close” alignment with the R
counter. (The maximum error is one prescaler cycle).
POWERDOWN OPERATION
Synchronous and asynchronous powerdown modes are
both available by MICROWIRE selection. Synchronously
powerdown occurs if the respective loop’s R18 bit (Do
TRI-STATE) is LOW when its N20 bit (Pwdn) becomes HI.
Asynchronous powerdown occurs if the loop’s R18 bit is HI
when its N20 bit becomes HI.
In the synchronous powerdown mode, the powerdown func-
tion is gated by the charge pump to prevent unwanted
frequency jumps. Once the powerdown program bit N20 is
loaded, the part will go into powerdown mode when the
charge pump reaches a TRI-STATE condition.
In the asynchronous powerdown mode, the device powers
down immediately after the LE pin latches in a HI condition
on the powerdown bit N20.
Activation of either the RF2 or RF1 PLL powerdown condi-
tions in either synchronous or asynchronous modes forces
the respective loop’sR&N dividers to their load state
condition and debiasing of its respective Fin input to a high
impedance state. The oscillator circuitry function does not
become disabled until both RF2 and RF1 powerdown bits
are activated. The MICROWIRE control register remains
active and capable of loading and latching data during all of
the powerdown modes.
The device returns to an actively powered up condition in
either synchronous ar asynchronous modes immediately
upon LE latching LOW data into bit N20.
Powerdown Mode Select Table
R18
N20
Powerdown Status
0
PLL Active
1
0
PLL Active (Charge Pump Output
TRI-STATE)
0
1
Synchronous Powerdown Initiated
1
Asynchronous Powerdown Initiated
LMX2335U/LMX2336U
www.national.com
11
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LMX2335USLBX | 功能描述:IC FREQ SYNTH DUAL 16LAMINATECSP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:PLLatinum™ 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| LMX2335UTM | 制造商:NSC 制造商全称:National Semiconductor 功能描述:PLLatinum Ultra Low Power Dual Frequency Synthesizer for RF Personal Communications |
| LMX2335UTM/NOPB | 功能描述:IC FREQ SYNTHESIZER DUAL 16TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:PLLatinum™ 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| LMX2335UTMX | 制造商:NSC 制造商全称:National Semiconductor 功能描述:PLLatinum Ultra Low Power Dual Frequency Synthesizer for RF Personal Communications |
| LMX2336 | 制造商:NSC 制造商全称:National Semiconductor 功能描述:PLLatinum⑩ Dual Frequency Synthesizer for RF Personal Communications |
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