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参数资料
| 型号： | LMX2350TM/NOPB |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 2500 MHz, PDSO24 |
| 封装： | PLASTIC, TSSOP-24 |
| 文件页数： | 15/21页 |
| 文件大小： | 405K |
| 代理商： | LMX2350TM/NOPB |
Pin Descriptions (Continued)
Pin No.
for CSP
Package
Pin No.
for
TSSOP
package
Pin Name
I/O
Description
9
10
OSCin
I
Oscillator input which can be configured to drive both the IF and RF R counter inputs
or only the IF R counter depending on the state of the OSC programming bit. (See
functional description 1.1 and programming description 3.1.)
10
11
FoLD
O
Multiplexed output of N or R divider and RF/IF lock detect. Active High/Low CMOS
output except in analog lock detect mode. (See programming description 3.1.5.)
11
12
RF_EN
I
RF PLL Enable. Powers down RF N and R counters, prescaler, and will TRI-STATE
the charge pump output when LOW. Bringing RF_EN high powers up RF PLL
depending on the state of RF_CTL_WORD. (See functional description 1.9.)
12
13
IF_EN
I
IF PLL Enable. Powers down IF N and R counters, prescaler, and will TRI-STATE the
charge pump output when LOW. Bringing IF_EN high powers up IF PLL depending on
the state of IF_CTL_WORD. (See functional description 1.9.)
13
14
CLOCK
I
High impedance CMOS Clock input. Data for the various counters is clocked into the
24 - bit shift register on the rising edge.
14
15
DATA
I
Binary serial data input. Data entered MSB first. The last two bits are the control bits.
High impedance CMOS input.
15
16
LE
I
Load enable high impedance CMOS input. Data stored in the shift registers is loaded
into one of the 4 internal latches when LE goes HIGH. (See functional description 1.7.)
16
17
GND
-
Ground for IF analog circuitry.
17
18
fin IF
I
IF prescaler complimentary input. A bypass capacitor should be placed as close as
possible to this pin and be connected directly to the ground plane.
18
19
fin IF
I
IF prescaler input. Small signal input from the VCO.
19
20
GND
-
Ground for IF digital circuitry.
20
21
CPo
IF
O
IF charge pump output. For connection to a loop filter for driving the input of an
external VCO.
21
22
Vp
IF
-
Power supply for IF charge pump. Must be
≥ V
ccRF and VccIF.
22
23
Vcc
IF
-
IF power supply voltage input. Must be equal to Vcc
RF . Input may range from 2.7 V to
5.5 V. Bypass capacitors should be placed as close as possible to this pin and be
connected directly to the ground plane.
23
24
OUT1
O
Programmable CMOS output. Level of the output is controlled by IF_N [18] bit.
LMX2350/LMX2352
www.national.com
3
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LMX2350TMX | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Serial-Input Frequency Synthesizer |
| LMX2350TMX/NOPB | 功能描述:IC FREQ SYNTH LOPWR DUAL 24TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:PLLatinum™ 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| LMX2352 | 制造商:未知厂家 制造商全称:未知厂家 功能描述: |
| LMX2352SLBX | 功能描述:IC FREQ SYNTH DUAL 24LAMINATECSP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:PLLatinum™ 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| LMX2352TM | 制造商:Texas Instruments 功能描述:IC, DUAL FREQ SYNTHESIZER 1.2GHZ 24-TSSOP, PLL Type:Frequency Synthesis, Frequen |
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