参数资料
型号: LPC2103FBD48,151
厂商: NXP Semiconductors
文件页数: 8/37页
文件大小: 0K
描述: IC ARM7 MCU FLASH 32K 48-LQFP
产品培训模块: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
ARM7 Architecture
ARM7 Memory
标准包装: 250
系列: LPC2100
核心处理器: ARM7
芯体尺寸: 16/32-位
速度: 70MHz
连通性: I²C,Microwire,SPI,SSI,SSP,UART/USART
外围设备: POR,PWM,WDT
输入/输出数: 32
程序存储器容量: 32KB(32K x 8)
程序存储器类型: 闪存
RAM 容量: 8K x 8
电压 - 电源 (Vcc/Vdd): 1.65 V ~ 3.6 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 48-LQFP
包装: 托盘
产品目录页面: 704 (CN2011-ZH PDF)
配用: 568-4310-ND - EVAL BOARD LPC2158 W/LCD
568-4302-ND - BOARD EVAL LPC210X KS2103 JLINK
568-4301-ND - BOARD EVAL LPC210X KS2103
568-4300-ND - BOARD EVAL LPC210X MCB2103
568-4297-ND - BOARD EVAL LPC21XX MCB2100
MCB2103UME-ND - BOARD EVAL MCB2103 + ULINK-ME
MCB2103U-ND - BOARD EVAL MCB2103 + ULINK2
622-1013-ND - BOARD FOR LPC2103 48-LQFP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
622-1005-ND - USB IN-CIRCUIT PROG ARM7 LPC2K
其它名称: 568-2094
935280966151
LPC2103FBD48-S
LPC2101_02_03_4
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 2 June 2009
16 of 37
NXP Semiconductors
LPC2101/02/03
Single-chip 16-bit/32-bit microcontrollers
Set HIGH on match.
Toggle on match.
Do nothing on match.
6.14 General purpose 16-bit timers/external event counters
The Timer/Counter is designed to count cycles of the peripheral clock (PCLK) or an
externally supplied clock and optionally generate interrupts or perform other actions at
specied timer values, based on four match registers. It also includes three capture inputs
to trap the timer value when an input signal transitions, optionally generating an interrupt.
Multiple pins can be selected to perform a single capture or match function, providing an
application with ‘or’ and ‘and’, as well as ‘broadcast’ functions among them.
The LPC2101/02/03 can count external events on one of the capture inputs if the
minimum external pulse is equal or longer than a period of the PCLK. In this conguration,
unused capture lines can be selected as regular timer capture inputs or used as external
interrupts.
6.14.1 Features
Two 16-bit timer/counters with a programmable 16-bit prescaler.
External event counter or timer operation.
Three 16-bit capture channels that can take a snapshot of the timer value when an
input signal transitions. A capture event may also optionally generate an interrupt.
Four 16-bit match registers that allow:
Continuous operation with optional interrupt generation on match.
Stop timer on match with optional interrupt generation.
Reset timer on match with optional interrupt generation.
Four external outputs per timer/counter corresponding to match registers, with the
following capabilities:
Set LOW on match.
Set HIGH on match.
Toggle on match.
Do nothing on match.
6.15 Watchdog timer
The purpose of the watchdog is to reset the microcontroller within a reasonable amount of
time if it enters an erroneous state. When enabled, the watchdog will generate a system
reset if the user program fails to ‘feed’ (or reload) the watchdog within a predetermined
amount of time.
6.15.1 Features
Internally resets chip if not periodically reloaded.
Debug mode.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
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