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参数资料
| 型号： | LPC2103FHN48H/6,51 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 6/37页 |
| 文件大小： | 0K |
| 描述： | IC ARM7 MCU FLASH 32K 48HVQFN |
| 标准包装： | 4,000 |
| 系列： | LPC2100 |
| 核心处理器： | ARM7 |
| 芯体尺寸： | 16/32-位 |
| 速度： | 70MHz |
| 连通性： | I²C，Microwire，SPI，SSI，SSP，UART/USART |
| 外围设备： | POR，PWM，WDT |
| 输入/输出数： | 32 |
| 程序存储器容量： | 32KB（32K x 8） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 8K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 1.65 V ~ 3.6 V |
| 数据转换器： | A/D 8x10b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
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LPC2101_02_03_4
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 2 June 2009
14 of 37
NXP Semiconductors
LPC2101/02/03
Single-chip 16-bit/32-bit microcontrollers
Built-in fractional baud rate generator covering wide range of baud rates without a
need for external crystals of particular values.
Transmission FIFO control enables implementation of software (XON/XOFF) ow
control on both UARTs.
UART1 is equipped with standard modem interface signals. This module also
provides full support for hardware ow control (auto-CTS/RTS).
6.10 I2C-bus serial I/O controllers
The LPC2101/02/03 each contain two I2C-bus controllers.
The I2C-bus is bidirectional, for inter-IC control using only two wires: a Serial Clock Line
(SCL), and a Serial Data Line (SDA). Each device is recognized by a unique address and
can operate as either a receiver-only device (e.g., LCD driver) or a transmitter with the
capability to both receive and send information such as serial memory. Transmitters
and/or receivers can operate in either master or slave mode, depending on whether the
chip has to initiate a data transfer or is only addressed. The I2C-bus is a multi-master bus,
it can be controlled by more than one bus master connected to it.
The I2C-bus implemented in LPC2101/02/03 supports bit rates up to 400 kbit/s (Fast
I2C-bus).
6.10.1 Features
Compliant with standard I2C-bus interface.
Easy to congure as Master, Slave, or Master/Slave.
Programmable clocks allow versatile rate control.
Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
The I2C-bus can also be used for test and diagnostic purposes.
6.11 SPI serial I/O controller
The LPC2101/02/03 each contain one SPI controller. The SPI is a full duplex serial
interface, designed to handle multiple masters and slaves connected to a given bus. Only
a single master and a single slave can communicate on the interface during a given data
transfer. During a data transfer the master always sends 8 bits to 16 bits of data to the
slave, and the slave always sends 8 bits to 16 bits of data to the master.
6.11.1 Features
Compliant with SPI specication.
Synchronous, Serial, Full Duplex, Communication.
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| LPC2104 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Single-chip 32-bit microcontrollers; 128 kB ISP/IAP Flash with 64 kB/32 kB/16 kB RAM |
| LPC2104BBD48 | 制造商:NXP Semiconductors 功能描述: |
| LPC2104BBD48,151 | 功能描述:ARM微控制器 - MCU ARM7 128KF/16KR/I2C RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 处理器系列:STM32F373xx 数据总线宽度:32 bit 最大时钟频率:72 MHz 程序存储器大小:256 KB 数据 RAM 大小:32 KB 片上 ADC:Yes 工作电源电压:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:LQFP-48 安装风格:SMD/SMT |
| LPC2104BBD48.151 | 制造商:NXP Semiconductors 功能描述:IC SM 32 BIT MCU WAFFLE125 制造商:NXP Semiconductors 功能描述:32BIT MCU 128K FLASH SMD LPC2104 |
| LPC2104BBD48.151 | 制造商:NXP Semiconductors 功能描述:IC 32BIT MCU 128K FLASH SMD 2104 |
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