参数资料
型号: LT1185CT
厂商: Linear Technology
文件页数: 7/16页
文件大小: 0K
描述: IC REG LDO NEG ADJ 3A TO220
标准包装: 50
稳压器拓扑结构: 负,可调式
输出电压: -2.5 V ~ -25 V
输入电压: -4.2 V ~ -35 V
电压 - 压降(标准): 0.67V @ 3A
稳压器数量: 1
电流 - 输出: 3A
电流 - 限制(最小): 可调式
工作温度: 0°C ~ 70°C
安装类型: 通孔
封装/外壳: TO-220-5 成形引线
供应商设备封装: TO-220-5
包装: 管件
LT1185
APPLICATIO S I FOR ATIO
Large output capacitors (electrolytic or solid tantalum)
will not cause the LT1185 to oscillate, but they will cause
a damped “ringing” at light load currents where the ESR
of the capacitor is several orders of magnitude lower than
the load resistance. This ringing only occurs as a result of
transient load or line conditions and normally causes no
problems because of its low amplitude ( ≤ 25mV).
Heat Sinking
The LT1185 will normally be used with a heat sink. The size
of the heat sink is determined by load current, input and
output voltage, ambient temperature, and the thermal
resistance of the regulator, junction-to-case ( θ JC ). The
LT1185 has two separate values for θ JC : one for the power
transistor section, and a second, lower value for the
control section. The reason for two values is that the
Example: A commercial version of the LT1185 in the
TO-220 package is to be used with a maximum ambient
temperature of 60 ° C. Output voltage is 5V at 2A. Input
voltage can vary from 6V to 10V. Assume an interface
resistance of 1 ° C/W.
First solve for control area, where the maximum junction
temperature is 125 ° C for the TO-220 package, and
θ JC = 1 ° C/W:
P = (10V – 5V) (2A) + 2A (10V) = 10.5W
40
θ HS = 125 ° C – 60 ° C – 1 ° C/W – 1 ° C/W = 4.2 ° C/W
10.5W
Next, solve for power transistor limitation, with
T JMAX = 150 ° C, θ JC = 3 ° C/W:
power transistor is capable of operating at higher continu-
ous temperature than the control circuitry. At low power
levels, the two areas are at nearly the same temperature,
θ HS =
150 – 60
10.5
– 3 – 1 = 4.6 ° C/W
θ HS =
– θ JC – θ CHS .
I
= (V IN – V OUT ) (I OUT ) + OUT (V IN )
and maximum temperature is limited by the control area.
At high power levels, the power transistor will be at a
significantly higher temperature than the control area
and its maximum operating temperature will be the
limiting factor.
To calculate heat sink requirements, you must solve a
thermal resistance formula twice, one for the power
transistor and one for the control area. The lowest value
obtained for heat sink thermal resistance must be used. In
these equations, two values for maximum junction tem-
perature and junction-to-case thermal resistance are used,
as given in Electrical Specifications.
( T JMAX – T AMAX )
P
θ HS = Maximum heat sink thermal resistance
θ JC = LT1185 junction-to-case thermal resistance
θ CHS = Case-to-heat sink (interface) thermal
resistance, including any insulating washers
T JMAX = LT1185 maximum operating junction
temperature
T AMAX = Maximum ambient temperature in
customers application
P = Device dissipaton
40
The lowest number must be used, so heat sink resistance
must be less than 4.2 ° C/W.
Some heat sink data sheets show graphs of heat sink
temperature rise vs power dissipation instead of listing a
value for thermal resistance. The formula for θ HS can be
rearranged to solve for maximum heat sink temperature
rise:
? T HS = T JMAX – T AMAX – P( θ JC + θ CHS )
Using numbers from the previous example:
? T HS = 125 ° C – 60 – 10.5(1 + 1) = 44 ° C control
section
? T HS = 150 ° C – 60 – 10.5(3 + 1) = 48 ° C power
transistor
The smallest rise must be used, so heat sink temperature
rise must be less than 44 ° C at a power level of 10.5W.
For board level applications, where heat sink size may be
critical, one is often tempted to use a heat sink which
barely meets the requirements. This is permissible if
correct assumptions were made concerning maximum
ambient temperature and power levels. One complicating
1185ff
7
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