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| 型号： | LT1219LCS8#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 4/16页 |
| 文件大小： | 0K |
| 描述： | IC PREC OP-AMP R-R IN/OUT 8-SOIC |
| 标准包装： | 2,500 |
| 系列： | C-Load™ |
| 放大器类型： | 通用 |
| 电路数： | 1 |
| 输出类型： | 满摆幅 |
| 转换速率： | 0.05 V/µs |
| 增益带宽积： | 150kHz |
| 电流 - 输入偏压： | 30nA |
| 电压 - 输入偏移： | 35µV |
| 电流 - 电源： | 400µA |
| 电流 - 输出 / 通道： | 12mA |
| 电压 - 电源，单路/双路(±)： | 2 V ~ 10 V，±1 V ~ 5 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SO |
| 包装： | 带卷 (TR) |
12
LT1218/LT1219
APPLICATIONS INFORMATION
WU
U
output stage with rail-to-rail swing. The amplifier is fabri-
cated on Linear Technology’s proprietary complementary
bipolar process, which ensures very similar DC and AC
characteristics for the output devices Q24 and Q26.
A simple comparator Q5 steers current from current
source I1 between the two input stages. When the input
common mode voltage VCM is near the negative supply,
Q5 is reverse biased, and I1 becomes the tail current for the
PNP differential pair Q1/Q2. At the other extreme, when
VCM is within about 1.3V from the positive supply, Q5
diverts I1 to the current mirror D3/Q6, which furnishes the
tail current for the NPN differential pair Q3/Q4.
The collector currents of the two input pairs are combined
in the second stage, consisting of Q7 through Q11. Most
of the voltage gain in the amplifier is contained in this
stage. Differential amplifier Q14/Q15 buffers the output of
the second stage, converting the output voltage to differ-
ential currents. The differential currents pass through
current mirrors D4/Q17 and D5/Q16, and are converted to
differential voltages by Q18 and Q19. These voltages are
also buffered and applied to the output Darlington pairs
Q23/Q24 and Q25/Q26. Capacitors C1 and C2 form local
feedback loops around the output devices, lowering the
output impedance at high frequencies.
Input Offset Voltage
Since the amplifier has two input stages, the input offset
voltage changes depending upon which stage is active.
The input offsets are random, but bounded voltages.
When the amplifier switches between stages, offset volt-
ages may go up, down or remain flat; but will not exceed
the guaranteed limits. This behavior is illustrated in three
distribution plots of input offset voltage in the Typical
Performance Characteristics section.
Overdrive Protection
Two circuits prevent the output from reversing polarity
when the input voltage exceeds the common mode range.
When the noninverting input exceeds the positive supply
by approximately 300mV, the clamp transistor Q12 (Fig-
ure 1) turns on, pulling the output of the second stage low,
which forces the output high. For input below the negative
supply, diodes D1 and D2 turn on, overcoming the satu-
ration of the input pair Q1/Q2.
When overdriven, the amplifier draws input current that
exceeds the normal input bias current. Figures 2 and 3
show typical input current as a function of input voltage.
The input current must be less than 10mA for the phase
reversal protection to work properly. When the amplifier is
severely overdriven, an external resistor should be used to
limit the overdrive current.
COMMON MODE VOLTAGE RELATIVE TO
NEGATIVE SUPPLY (mV)
– 800
–110
INPUT
BIAS
CURRENT
(nA)
–90
–70
–50
–30
– 600
– 400
LT1218/19 F03
–200
–10
0
–20
–40
–60
–80
–100
VS
200
T = – 55
°C T = 25°C
T = 85
°C
–
+
T = 70
°C
MEASURED AS A FOLLOWER
Figure 3. Input Bias Current vs Common Mode Voltage
COMMON MODE VOLTAGE RELATIVE TO
POSITIVE SUPPLY (mV)
–500
0
INPUT
BIAS
CURRENT
(nA)
20
40
60
80
–300
–100 VS
LT1218/19 F02
100
110
90
70
50
30
10
300
500
T = –55
°C
T = 25
°C
T = 85
°C
T = 70
°C
MEASURED AS A
FOLLOWER
–
+
Figure 2. Input Bias Current vs Common Mode Voltage
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