参数资料
型号: LT1306ES8#PBF
厂商: Linear Technology
文件页数: 9/16页
文件大小: 0K
描述: IC REG BOOST 5V 1A 8SOIC
标准包装: 100
类型: 升压(升压)
输出类型: 固定
输出数: 1
输出电压: 5V
输入电压: 1.8 V ~ 7 V
PWM 型: 电流模式,混合
频率 - 开关: 310kHz
电流 - 输出: 1A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 管件
供应商设备封装: 8-SOIC
LT1306
APPLICATIO N S I N FOR M ATIO N
Output Voltage Setting
The output voltage of the LT1306 is set with a resistive
divider, R1 and R2 (Figure 1 and Figure 5), from the output
to ground. The divider tap is tied to the FB pin. Current
through R2 should be significantly higher than the FB pin
input bias current ( ≤ 25nA). With R2 = 249k, the input bias
current of the error amplifier is 0.5% of the current in R1.
V O
The inductor should be able to handle the full load peak
inductor current without saturation. The peak inductor
current can be as high as 2A. This places a lower limit on
the core size of the inductor. Powder iron cores have
unacceptable core losses and are not suitable for high
efficiency applications. Most ferrite core materials have
manageable core losses and are recommended. Inductor
DC winding resistance (DCR) also needs to be considered
for efficiency. Usually there are trade-offs between core
( )
V O = 1.24V 1 + R1
( )
V O
FB PIN
R1
R2
1.24
R2
R1 = R2 –1
loss, DCR, saturation current, cost and size.
For EMI sensitive applications, one may want to use
magnetically shielded or toroidal inductors to contain field
radiation. Table 1 lists a number of inductors suitable for
1306 F05
Figure 5. Feedback Resistive Divider
LT1306 applications.
Table 1. Inductors Suitable for Use with the LT1306
PART
VALUE MAX DCR
CORE
HEIGHT
VENDOR
NO.
( μ H) ( ? )
TYPE
(mm)
Synchronization and Shutdown
BH Electronics 511-0033
5.0
0.023
Toroid
4.8
The S/S pin (Pin 8) can be used to synchronize the
oscillator or disconnect the load from the input. The S/S
pin is tied to the input (V IN > 1.8V) for normal operation.
The oscillator in the LT1306 can be externally synchro-
nized by driving the S/S pin with a pulse train (See the
graph “Maximum Allowable Rise Time of Synchronizing
Pulse” in the Typical Performance Characteristics). The
synchronization is positive edge triggered. The recom-
Coilcraft
Coiltronics
Murata
Sumida
DO3308-103
DO3316-472
DO3316-103
DO3316-153
CTX5-2
CTX10-2
LQN6C4R7
CDRH73-100
10
4.7
10
15
5
10
4.7
10
0.09
0.018
0.029
0.046
0.021
0.032
0.034
0.072
Open
Open
Open
Open
Toroid
Toroid
Open
Magnetic
3.0
5.2
5.2
5.2
6.0
6.0
5.0
3.4
mended frequency of the external clock ranges from
Shielding
425kHz to 500kHz. If synchronization results in switching
CD43-4R7
4.7
0.109
Open
3.2
jitter, reducing the rising edge dv/dt of the external clock
pulse usually cures the problem.
Shutdown will be activated if the S/S pin voltage stays
below the shutdown threshold (0.45V) for more than
50 μ s. This shutdown delay is reset whenever the S/S pin
goes above the shutdown threshold.
Inductor
Capacitors
The output filter capacitor is usually chosen based on its
equivalent series resistance (ESR) and the acceptable
change in output voltage as a result of load transients. The
output voltage ripple at the switching frequency can be
estimated by considering the peak inductor current and
the capacitor ESR.
( I O )( V O )
The value of the energy storage inductor L1 (Figure 1) is
usually selected so that the peak-to-peak ripple current is
less than 40% of the average inductor current. For 1- or
2-cell alkaline or single Li-Ion to 5V applications, 10 μ H to
20 μ H is recommended for the LT1306 running at 300kHz.
A 5 μ H to 10 μ H inductor can be used if the LT1306 is
externally synchronized at 500kHz.
I PEAK ≈ I IN ≈
V IN
output ripple ? (ESR)(I PEAK ) =
( ESR )( I O )( V O )
V IN
9
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