参数资料
型号: LT1317IS8#TRPBF
厂商: Linear Technology
文件页数: 8/16页
文件大小: 0K
描述: IC REG BOOST ADJ 0.5A 8SOIC
标准包装: 2,500
类型: 升压(升压)
输出类型: 可调式
输出数: 1
输出电压: 1.24 V ~ 30 V
输入电压: 1.5 V ~ 12 V
PWM 型: 电流模式,混合
频率 - 开关: 600kHz
电流 - 输出: 500mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
供应商设备封装: 8-SOIC
LT1317/LT1317B
APPLICATIO N S I N FOR M ATIO N
The LT1317B differs from the LT1317 in that the bias point
GROUND PLANE
on A1 is set lower than on the LT1317 so that minimum
switch current can drop below 50mA. Because A1’s bias
point is set lower, there is no Burst Mode operation at light
loads and the device continues switching at constant
frequency. This results in the absence of low frequency
1
2
3
4
LT1317
8
7
6
5
L
V IN
output voltage ripple at the expense of light load efficiency.
The difference between the two devices is clearly illus-
trated in Figure 2. The top two traces in Figure 2 show an
MULTIPLE
VIAs
C IN
C OUT
D
LT1317/LT1317B circuit, using the components indicated
in Figure 1, set to a 3.3V output. Input voltage is 2V. Load
GND
V OUT
1317 F03
current is stepped from 2mA to 200mA for both circuits.
Low frequency Burst Mode operation voltage ripple is
observed on Trace A, while none is observed on Trace B.
LT1317
Figure 3. Recommended Component Placement. Traces Carrying
High Current Are Direct. Trace Area at FB Pin and V C Pin is Kept
Low. Lead Length to Battery Should be Kept Short.
COMPONENT SELECTION
TRACE A
TRACE B
V OUT
100mV/DIV
AC COUPLED
LT1317B
V OUT
100mV/DIV
AC COUPLED
Inductors
Inductors appropriate for use with the LT1317 must
possess three attributes. First, they must have low core
I LOAD
200mA
2mA
1ms/DIV 1317 F02
Figure 2. LT1317 Exhibits Ripple at 2mA Load
During Burst Mode Operation, the LT1317B Does Not
LAYOUT HINTS
The LT1317 switches current at high speed, mandating
careful attention to layout for proper performance. You
will not get advertised performance with careless layouts.
Figure 3 shows recommended component placement.
Follow this closely in your PC layout. Note the direct path
of the switching loops. Input capacitor C IN must be placed
close (< 5mm) to the IC package. As little as 10mm of wire
or PC trace from C IN to V IN will cause problems such as
inability to regulate or oscillation.
8
loss at 600kHz. Most ferrite core units have acceptable
losses at this switching frequency. Inexpensive iron pow-
der cores should be viewed suspiciously, as core losses
can cause significant efficiency penalties at 600kHz. Sec-
ond, the inductor must be able to handle peak switch
current of the LT1317 without saturating. This places a
lower limit on the physical size of the unit. Molded chokes
or chip inductors usually do not have enough core to
support the LT1317 maximum peak switch current and are
unsuitable for the application. Lastly, the inductor should
have low DCR (copper wire resistance) to prevent effi-
ciency-killing I 2 R losses. Linear Technology has identified
several inductors suitable for use with the LT1317. This is
not an exclusive list. There are many magnetics vendors
whose components are suitable for use. A few vendor’s
components are listed in Table 1.
相关PDF资料
PDF描述
LT1317IS8#TR IC REG BOOST ADJ 0.5A 8SOIC
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