参数资料
型号: LT1371CT7
厂商: Linear Technology
文件页数: 7/16页
文件大小: 0K
描述: IC REG MULTI CONFIG ADJ TO220-7
标准包装: 50
类型: 降压(降压),升压(升压),反相,Cuk,回扫,正向转换器
输出类型: 可调式
输出数: 1
输出电压: 1.25 V ~ 35 V
输入电压: 2.7 V ~ 25 V
PWM 型: 电流模式
频率 - 开关: 500kHz
电流 - 输出: 3A
同步整流器:
工作温度: 0°C ~ 70°C
安装类型: 通孔
封装/外壳: TO-220-7 成形引线
包装: 管件
供应商设备封装: TO-220-7
LT1371
APPLICATIO S I FOR ATIO
Unique error amplifier circuitry allows the LT1371 to
directly regulate negative output voltages. The negative
feedback amplifier’s 100k source resistor is brought out
for negative output voltage sensing. The NFB pin regulates
at – 2.49V while the amplifier output internally drives the
FB pin to 1.245V. This architecture, which uses the same
main error amplifier, prevents duplicating functions and
maintains ease of use. Consult LTC Marketing for units
that can regulate down to – 1.25V.
The error signal developed at the amplifier output is
brought out externally. This pin (V C ) has three different
APPLICATIO S I FOR ATIO
functions. It is used for frequency compensation, current
limit adjustment and soft starting. During normal regula-
tor operation this pin sits at a voltage between 1V (low
output current) and 1.9V (high output current). The error
amplifier is a current output (g m ) type, so this voltage can
be externally clamped for lowering current limit. Like-
wise, a capacitor coupled external clamp will provide soft
start. Switch duty cycle goes to zero if the V C pin is pulled
below the control pin threshold, placing the LT1371 in an
idle mode.
( )
V OUT = V REF 1 + R1
( )
V OUT
Positive Output Voltage Setting
The LT1371 develops a 1.245V reference (V REF ) from the
FB pin to ground. Output voltage is set by connecting the
FB pin to an output resistor divider (Figure 1). The FB pin
bias current represents a small error and can usually be
FB
PIN
V REF
V OUT
R1
R2
R1 = R2 –1
R2
1.245
LT1371 ? F01
ignored for values of R2 up to 7k. The suggested value for
R2 is 6.19k. The NFB pin is normally left open for positive
output applications. Positive fixed voltage versions are
Figure 1. Positive Output Resistor Divider
( )
–V OUT = V NFB 1 + R1 + I NFB (R1)
available (consult LTC Marketing).
Negative Output Voltage Setting
NFB
I NFB
–V OUT
R1
R2
? V OUT ? – 2.49
( )( )
R2
2.49 + 30 ? 10 – 6
The LT1371 develops a – 2.49V reference (V NFR ) from the
NFB pin to ground. Output voltage is set by connecting the
NFB pin to an output resistor divider (Figure 2). The
–30 μ A NFB pin bias current (I NFB ) can cause output
voltage errors and should not be ignored. This has been
accounted for in the formula in Figure 2. The suggested
value for R2 is 2.49k. The FB pin is normally left open for
negative output applications. See Dual Polarity Output
Voltage Sensing for limitations on FB pin loading when
using the NFB pin.
Dual Polarity Output Voltage Sensing
Certain applications benefit from sensing both positive
and negative output voltages. One example is the “Dual
Output Flyback Converter with Overvoltage Protection”
circuit shown in the Typical Applications section. Each
output voltage resistor divider is individually set as de-
scribed above. When both the FB and NFB pins are used,
PIN
R1 =
V NFR R2
LT1371 ? F02
Figure 2. Negative Output Resistor Divider
the LT1371 acts to prevent either output from going
beyond its set output voltage. For example, in this applica-
tion if the positive output were more heavily loaded than
the negative, the negative output would be greater and
would regulate at the desired set-point voltage. The posi-
tive output would sag slightly below its set-point voltage.
This technique prevents either output from going unregu-
lated high at no load. Please note that the load on the FB
pin should not exceed 250 μ A when the NFB pin is used.
This situation occurs when the resistor dividers are used
at both FB and NFB. True load on FB is not the full divider
current unless the positive output is shorted to ground.
See Dual Output Flyback Converter application.
7
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