参数资料
型号: LT1578CS8-2.5#TRPBF
厂商: Linear Technology
文件页数: 9/28页
文件大小: 0K
描述: IC REG BUCK 2.5V 1.5A 8SOIC
标准包装: 2,500
类型: 降压(降压)
输出类型: 固定
输出数: 1
输出电压: 2.5V
输入电压: 4 V ~ 15 V
PWM 型: 电流模式
频率 - 开关: 200kHz
电流 - 输出: 1.5A
同步整流器:
工作温度: 0°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
供应商设备封装: 8-SOIC
LT1578/LT1578-2.5
APPLICATIO N S I N FOR M ATIO N
I OUT(MAX) = ( V OUT ) ( V IN ? V OUT )
( )( )( )
I P ?
2 L f V IN
( 5 ) ( 8 ? 5 )
( )
()
I OUT MAX = 1 . 43 ?
2 15 ? 10 200 ? 10 8
Inadditiontolowerswitchingfrequency,theLT1578also
operates at lower switch current limit when the feedback
pin voltage drops below 0.7V. Q2 in Figure 2 performs this
function by clamping the V C pin to a voltage less than its
normal 2.1V upper clamp level. This foldback current limit
greatly reduces power dissipation in the IC, diode and
inductor during short-circuit conditions. External synchro-
nization is also disabled to prevent interference with
foldback operation. Again, it is nearly transparent to the
user under normal load conditions. The only loads that may
be affected are current sources, such as lamps and mo-
tors, that maintain high load current with output voltage
less than 50% of final value. In these rare situations the
feedback pin can be clamped above 0.7V to defeat foldback
current limit. Caution: clamping the feedback pin means
that frequency shifting will also be defeated, so a combina-
tion of high input voltage and dead shorted output may
cause the LT1578 to lose control of current limit.
The internal circuitry which forces reduced switching
frequency also causes current to flow out of the feedback
pin when output voltage is low. The equivalent circuitry is
shown in Figure 2. Q1 is completely off during normal
operation. If the FB pin falls below 0.7V, Q1 begins to
conduct current and reduces frequency at the rate of
approximately 1kHz/ μ A. To ensure adequate frequency
foldback (under worst-case short-circuit conditions), the
external divider Thevinin resistance must be low enough
to pull 35 μ A out of the FB pin with 0.5V on the pin (R DIV ≤
14.3k). The net result is that reductions in frequency and
current limit are affected by output voltage divider imped-
ance. Although divider impedance is not critical, caution
should be used if resistors are increased beyond the
suggested values and short-circuit conditions will occur
with high input voltage. High frequency pickup will
increase and the protection accorded by frequency and
graphically in Typical Performance Characteristics and as
shown in the formula below:
I P = 1.5A for DC ≤ 50%
I P = 1.67 – 0.18 (DC) – 0.32(DC) 2 for 50% < DC < 90%
DC = Duty cycle = V OUT /V IN
Example: with V OUT = 5V, V IN = 8V; DC = 5/8 = 0.625, and;
I SW(MAX) = 1.67 – 0.18 (0.625) – 0.32(0.625) 2 = 1.43A
Current rating decreases with duty cycle because the
LT1578 has internal slope compensation to prevent cur-
rent mode subharmonic switching. For more details, read
Application Note 19. The LT1578 is a little unusual in this
regard because it has nonlinear slope compensation which
gives better compensation with less reduction in current
limit.
Maximum load current would be equal to maximum
switch current for an infinitely large inductor, but with
finite inductor size, maximum load current is reduced by
one-half peak-to-peak inductor current. The following
formula assumes continuous mode operation, implying
that the term on the right is less than one-half of I P .
Continuous Mode
For the conditions above and L = 15 μ H,
? ? 6 ? ? 3 ?
? ? ? ?
= 1 . 43 ? 0 . 31 = 1 . 12 A
current foldback will decrease.
At V IN = 15V, duty cycle is 33%, so I P is just equal to a fixed
MAXIMUM OUTPUT LOAD CURRENT
1.5A, and I OUT(MAX) is equal to:
( )
2 15 ? 10 200 ? 10 15
Maximum load current for a buck converter is limited by
the maximum switch current rating (I P ) of the LT1578.
This current rating is 1.5A up to 50% duty cycle (DC),
decreasing to 1.3A at 80% duty cycle. This is shown
1 . 5 ?
? ? 6 ? ? 3 ?
? ? ? ?
( 5 ) ( 15 ? 5 )
= 1 . 5 ? 0 . 56 = 0 . 94 A
9
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