参数资料
型号: LT1618EMS#TRPBF
厂商: Linear Technology
文件页数: 8/16页
文件大小: 0K
描述: IC REG BOOST ADJ 1.5A 10MSOP
标准包装: 2,500
类型: 升压(升压)
输出类型: 可调式
输出数: 1
输出电压: 1.26 V ~ 36 V
输入电压: 1.6 V ~ 18 V
PWM 型: 电流/电压模式
频率 - 开关: 1.4MHz
电流 - 输出: 1.5A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
包装: 带卷 (TR)
供应商设备封装: 10-MSOP
LT1618
APPLICATIO N S I N FOR M ATIO N
When sensing input current, the sense resistor should be
placed in front of the inductor (between the decoupling
capacitor and the inductor) as shown in the circuits in the
Typical Applications section. This will regulate the average
inductor current and maintain a consistent inductor ripple
current, which will, in turn, maintain a well regulated input
current. Do not place the sense resistor between the input
source and the input decoupling capacitor, as this may
allow the inductor ripple current to vary widely (even
though the average input current and the average inductor
current will still be regulated). Since the inductor current
is a triangular waveform (not a DC waveform like the
output current) some tweaking of the compensation
values (R C and C C on the V C pin) may be required to ensure
a clean inductor ripple current while the constant-current
loop is in effect. For these applications, the constant-
current loop response can usually be improved by reduc-
ing the R C value, or by adding a capacitor (with a value of
approximately C C /10) in parallel with the R C and C C
compensation network.
Frequency Compensation
The LT1618 has an external compensation pin (V C ), which
allows the loop response to be optimized for each applica-
tion. An external resistor and capacitor (or sometimes just
a capacitor) are placed at the V C pin to provide a pole and
a zero (or just a pole) to ensure proper loop compensation.
Numerous other poles and zeroes are present in the closed
loop transfer function of a switching regulator, so the V C
pin pole and zero are positioned to provide the best loop
response. A thorough analysis of the switching regulator
control loop is not within the scope of this data sheet, and
will not be presented here, but values of 2k ? and 10nF will
be a good choice for many designs. For those wishing to
optimize the compensation, use the 2k ? and 10nF as a
starting point. For LED backlight applications where a
pulse-width modulation (PWM) signal is used to drive
the I ADJ pin, the resistor is usually not included in the
compensation network. This helps to provide additional
filtering of the PWM signal at the output of the error
amplifier (the V C pin).
Switch Node Considerations
To maximize efficiency, switch rise and fall times are made
as short as possible. To prevent radiation and high fre-
quency resonance problems, proper layout of the high
frequency switching path is essential. Keep the output
switch (SW pin), diode and output capacitor as close
together as possible. Minimize the length and area of all
traces connected to the switch pin, and always use a
ground plane under the switching regulator to minimize
interplane coupling. The high speed switching current
path is shown in Figure 3. The signal path including the
switch, output diode and output capacitor contains nano-
second rise and fall times and should be kept as short as
possible.
L1
SWITCH
NODE
HIGH
V OUT
V IN
FREQUENCY
LOAD
CIRCULATING
PATH
1618 ? F03
Figure 3
sn1618 1618fas
8
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