参数资料
| 型号： | LT1680ISW#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 13/16页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BST PWM CM 16-SOIC |
| 标准包装： | 47 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 200kHz |
| 占空比： | 90% |
| 电源电压： | 4 V ~ 60 V |
| 降压： | 无 |
| 升压： | 是 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 包装： | 管件 |
| 产品目录页面： | 1328 (CN2011-ZH PDF) |
LT1680
APPLICATIO S I FOR ATIO
imposes an exponential increase in the slope compensa-
tion waveform, further increasing the effective compen-
sation slope up to 20% for a given setting.
Design example:
V IN = 20V
V OUT = 80V (DC = 0.75)
R SENSE = 0.01 ?
2.5V
2V
0.8V
f O = 100kHz
L = 20 μ H
The minimum inductor usable with no additional slope
compensation is:
DC = 0.75
(0.084 + 0.139)(f O )
R SENSE
(0.084)(f O )
( ) ( )( ) 1 = 47 . 6 μ H
L MIN ≥
20 V 0 . 01 ? 1 . 5 –
( 0 . 084 )( 100000 )( 1 – 0 . 75 )
1680 F07b
R SENSE
? ( 1 . 5 – 1 )
? 20 μ H ?
S X ≥
= ( 2 )( 10 6 )
( 2500 )( f O )
( 2 ) ( ) 6 ( R SENSE O f )
) – ( 0 . 084 )(
Since L = 20μH is less than L MIN , additional slope
compensation is necessary. The total slope compensa-
tion required is:
? 20 V ?
?
Amp/s
1 – 0 . 75
Subtracting the internally generated slope compensation
and solving for the required effective resistance at SL/ADJ
yields:
R EQ ≤ = 21 . 5 k
10
Setting the resistor divider reference voltage to 2V assures
that the additional compensation waveform will be en-
abled at a 75% duty cycle. As shown in Figure 7a, using
R SL1 = 45k and R SL2 = 30k sets the desired reference
voltage and has a R TH of 18k, which meets both design
requirements. Figure 7b shows the slope compensation
effective waveforms both with and without the SL/ADJ
external resistors.
Figure 7b. Slope Compensation Waveforms
Power MOSFET and Output Rectifying Diode Selection
LT1680 converter system parameters that dictate selec-
tion criteria for the switch MOSFET and output rectifying
diode include maximum load current (I OUT ), inductor
average current (I AVG ) and inductor ripple current ( ? I),
and maximum input and output voltages.
The switch MOSFETs selected must have a maximum
operating V DSS exceeding the maximum output voltage
(V OUT ). V GS rated operating maximums must exceed the
12V IN supply voltage. Once voltage requirements have
been determined, switch conduction resistance (R DS(ON) )
can be determined based on allowable power dissipation.
In a typical LT1680 boost converter, the switch current is
equal to the inductor current, but is chopped according to
duty cycle (DC). The conduction loss (P LOSS ) for a given
FET R DS(ON) can be calculated using the relation:
P LOSS ≈ (DC)(R DS(ON) )(I AVG2 + [ ? I 2 /12])
where I AVG = average inductor current and ? I = peak-to-
peak inductor ripple current.
R SL1
45k
R SL2
30k
16
1
5V REF
LT1680
SL/ADJ
1680 F07a
The output diode is often a major source of power loss in
switching regulators and selection of adequately rated
diodes is important. In a boost converter, when the output
voltage is significantly higher than the input voltage, the
peak diode current becomes much higher than average
Figure 7a. External Slope Compensation Resistors
13
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