参数资料
型号: LT1680ISW
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: High Power DC/DC Step-Up Controller
中文描述: SWITCHING CONTROLLER, 200 kHz SWITCHING FREQ-MAX, PDSO16
封装: 0.300 INCH, PLASTIC, SOP-16
文件页数: 10/16页
文件大小: 322K
代理商: LT1680ISW
10
LT1680
APPLICATIO
S I
N
FOR
ATIO
U
W
U
and a soft start timing capacitor C
SS
, the start-up delay
time to full available average current will be:
t
SS
= (1.8)(10
5
)(C
SS
)
Shutdown Function—Input Undervoltage Detect
and Threshold Hysteresis
The LT1680 RUN/SHDN pin uses a bandgap generated
reference threshold of about 1.25V. This precision thresh-
old allows use of the RUN/SHDN pin for both logic-level
shutdown applications and analog monitoring applica-
tions such as power supply sequencing.
Because an LT1680 controlled converter is a power trans-
fer device, a voltage that is lower than expected on the
input supply could require currents that exceed the sourc-
ing capabilities of that supply, causing the system to lock-
up in an undervoltage state. Input supply start-up protection
can be achieved by enabling the RUN/SHDN pin using a
resistor divider from the input supply to ground. Setting
the divider output to 1.25V when the supply is almost fully
enabled prevents the LT1680 regulator from drawing large
currents until the input supply is able to supply the
required power.
If additional hysteresis is desired for the enable function,
an external feedback resistor can be used from the LT1680
regulator output. If connection to the regulator output is
not desired, the 5V
REF
internal supply pin can be used.
Figure 3 shows an input supply sequencing configuration
on a 24V input converter. This configuration yields an
enable condition of 90% V
IN
(~21.5V) with about 10%
threshold hysteresis.
The shutdown function can be disabled by connecting the
RUN/SHDN pin to the 12V
IN
rail. This pin is internally
clamped to 2.5V through a 20k series input resistance and
will therefore draw 0.5mA when tied directly to 12V. This
Figure 3. Input Supply Sequencing Programming
TIMING RESISTOR (k
)
3
7 11 15 19 23 27 31 35 39 43 47
O
200
180
160
140
120
100
80
60
40
1680 F02
C
CT
= 0.68nF
C
CT
= 1nF
C
CT
= 2.2nF
C
CT
= 1.5nF
Figure 2. Operating Frequency vs R
CT
, C
CT
Average Current Limit
The average current limit function is implemented using
an external capacitor (C
AVG
) connected from I
AVG
to
SGND. This capacitor forms a single pole integrator with
the 50k
output impedance of the I
AVG
pin. The integrator
corner frequency is typically set 1 to 2 orders of magnitude
below the oscillator frequency and follows the relation:
f
–3dB
= (3.2)(10
–6
)/C
AVG
The average current limit function can be disabled by
shorting the I
AVG
pin directly to SGND. In some applica-
tions it is theoretically possible for the average current
limit circuit to overdrive the error amplifier output (V
C
pin)
beyond the operating range of the current sense compara-
tor. These applications include those where open-loop
system operation occurs, such as boost regulators in
output short-circuit condition, or in systems with poor
signal ground integrity. The potential for this overdrive can
be eliminated by connecting an external clamp diode
between the I
AVG
and V
C
pins (anode to I
AVG
and cathode
to V
C
). Connection of this diode will have no adverse
effects in any system and is recommended. This clamp is
required for all boost converter topologies.
Soft Start Programming
The LT1680 current control pin (V
C
) limits inductor cur-
rent to zero at voltages less than
0.7V through full
average current limit at V
C
2.5V, yielding 1.8V over the
full regulation range of average load current. With the SS
pin at 0V, the V
C
pin is clamped to its zero inductor current
level. Given the typical soft start charge current of 10
μ
A
V
IN
24V
16
11
160k
390k
10k
1680 F03
5V
REF
RUN/SHDN
LT1680
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