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| 型号： | LT1719IS8#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 9/22页 |
| 文件大小： | 0K |
| 描述： | IC COMP R-RINOUT SINGLE 8-SOIC |
| 标准包装： | 2,500 |
| 系列： | UltraFast™ |
| 类型： | 通用 |
| 元件数： | 1 |
| 输出类型： | CMOS，满摆幅，TTL |
| 电压 - 电源，单路/双路(±)： | 2.7 V ~ 6 V |
| 电压 - 输入偏移（最小值）： | 2.5mV @ ±5V |
| 电流 - 输入偏压（最小值）： | 6µA @ ±5V |
| 电流 - 输出（标准）： | 20mA |
| 电流 - 静态（最大值）： | 9mA |
| CMRR, PSRR（标准）： | 70dB CMRR，80dB PSRR |
| 传输延迟（最大）： | 4.2ns |
| 磁滞： | 7mV |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 安装类型： | 表面贴装 |
| 包装： | 带卷 (TR) |
LT1719
17
1719fa
three categories: input speed limits, output speed limits,
and internal speed limits.
There are no signicant input speed limits except the shunt
capacitance of the input nodes. If the 2pF typical input
nodes are driven, the LT1719 will respond.
The output speed is constrained by two mechanisms, the
rst of which is the slew currents available from the output
transistors. To maintain low power quiescent operation,
the LT1719 output transistors are sized to deliver 25mA
to 45mA typical slew currents. This is sufcient to drive
small capacitive loads and logic gate inputs at extremely
high speeds. But the slew rate will slow dramatically with
heavy capacitive loads. Because the propagation delay (tPD)
denition ends at the time the output voltage is halfway
between the supplies, the xed slew current makes the
LT1719 faster at 3V than 5V with large capacitive loads
and sufcient input overdrive.
Another manifestation of this output speed limit is skew,
the difference between tPD+ and tPD–. The slew currents
of the LT1719 vary with the process variations of the
PNP and NPN transistors, for rising edges and falling
edges respectively. The typical 0.5ns skew can have either
polarity, rising edge or falling edge faster. Again, the skew
will increase dramatically with heavy capacitive loads.
A separate output speed limit is the clamp turnaround.
The LT1719 output is optimized for fast initial response,
with some loss of turnaround speed, limiting the toggle
frequency. The output transistors are idled in a low power
state once VOH or VOL is reached, by detecting the Schottky
clamp action. It is only when the output has slewed from
the old voltage to the new voltage, and the clamp circuitry
has settled, that the idle state is reached and the LT1719
is fully ready to toggle again. This is typically 8ns for each
direction, resulting in a maximum toggle frequency of
62.5MHz. With higher frequencies, dropout and runt pulses
can result. Increases in capacitive load will increase the time
needed for slewing due to the limited slew currents and
the maximum toggle frequency will decrease further. For
high toggle frequency applications, consider the LT1394,
whose linear output stage can toggle at 100MHz typical.
The internal speed limits manifest themselves as disper-
sion. All comparators have some degree of dispersion,
dened as a change in propagation delay versus input
overdrive. The propagation delay of the LT1719 will vary
with overdrive, from a typical of 4.5ns at 20mV overdrive
to 7ns at 5mV overdrive (typical). The LT1719’s primary
source of dispersion is the hysteresis stage. As a change
of polarity arrives at the gain stage, the positive feedback
of the hysteresis stage subtracts from the overdrive avail-
able. Only when enough time has elapsed for a signal to
propagate forward through the gain stage, backwards
through the hysteresis path and forward through the gain
stage again, will the output stage receive the same level
of overdrive that it would have received in the absence
of hysteresis.
The LT1719S8 is several hundred picoseconds faster when
VEE = – 5V, relative to single supply operation. This is due
to the internal speed limit; the gain stage operates between
VEE and +VS, and it is faster with higher reverse voltage
bias due to reduced silicon junction capacitances.
In many applications, as shown in the following examples,
there is plenty of input overdrive. Even in applications pro-
viding low levels of overdrive, the LT1719 is fast enough
that the absolute dispersion of 2.5ns (= 7 – 4.5) is often
small enough to ignore.
The gain and hysteresis stage of the LT1719 is simple, short
and high speed to help prevent parasitic oscillations while
adding minimum dispersion. This internal “self-latch” can
be usefully exploited in many applications because it occurs
early in the signal chain, in a low power, fully differential
stage. It is therefore highly immune to disturbances from
other parts of the circuit, such as the output, or on the
supply lines. Once a high speed signal trips the hysteresis,
the output will respond, after a xed propagation delay,
without regard to these external inuences that can cause
trouble in nonhysteretic comparators.
APPLICATIONS INFORMATION
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相关代理商/技术参数 |
参数描述 |
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| LT1720 | 制造商:LINER 制造商全称:Linear Technology 功能描述:4ns, 150MHz Dual Comparator with Independent Input/Output Supplies |
| LT1720CDD | 功能描述:IC COMP R-R IN/OUT DUAL 8DFN RoHS:否 类别:集成电路 (IC) >> 线性 - 比较器 系列:UltraFast™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
| LT1720CDD#PBF | 功能描述:IC COMP R-R IN/OUT DUAL 8DFN RoHS:是 类别:集成电路 (IC) >> 线性 - 比较器 系列:UltraFast™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
| LT1720CDD#TR | 功能描述:IC COMPARATOR DUAL HS 3/5V 8-DFN RoHS:否 类别:集成电路 (IC) >> 线性 - 比较器 系列:UltraFast™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
| LT1720CDD#TRPBF | 功能描述:IC COMP R-R IN/OUT DUAL 8DFN RoHS:是 类别:集成电路 (IC) >> 线性 - 比较器 系列:UltraFast™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
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