参数资料
型号: LT1738EG#PBF
厂商: Linear Technology
文件页数: 6/20页
文件大小: 0K
描述: IC REG CTRLR PWM CM 20-SSOP
标准包装: 66
PWM 型: 电流模式
输出数: 1
频率 - 最大: 250kHz
占空比: 93.5%
电源电压: 2.55 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 20-SSOP(0.209",5.30mm 宽)
包装: 管件
产品目录页面: 1328 (CN2011-ZH PDF)
LT1738
PI FU CTIO S
Part Supply
V5 (Pin 5): This pin provides a 5V output that can sink or
source 10mA for use by external components. V5 source
current comes from V IN . Sink current goes to GND. V IN
must be greater than 6.5V in order for this voltage to be in
regulation. If this pin is used, a small capacitor (<1 μ F) may
be placed on this pin to reduce noise. This pin can be left
open if not used.
GND (Pin 11): Signal Ground. The internal error amplifier,
negative feedback amplifier, oscillator, slew control cir-
cuitry, V5 regulator, current sense and the bandgap refer-
ence are referred to this ground. Keep the connection to
this pin, the feedback divider and V C compensation net-
work free of large ground currents.
SHDN (Pin 14): The shutdown pin can disable the switcher.
Grounding this pin will disable all internal circuitry.
Increasing SHDN voltage will initially turn on the internal
bandgap regulator. This provides a precision threshold for
the turn on of the rest of the IC. As SHDN increases past
1.39V the internal LDO regulator turns on, enabling the
control and logic circuitry.
24 μ A of current is sourced out of the pin above the turn on
threshold. This can be used to provide hysteresis for the
shutdown function. The hysteresis voltage will be set by
the Thevenin resistance of the resistor divider driving this
pin times the current sourced out. Above approximately
2.1V the hysteresis current is removed. There is approxi-
mately 0.1V of voltage hysteresis on this pin as well.
The pin can be tied high (to V IN for instance).
V IN (Pin 17): Input Supply. All supply current for the part
comes from this pin including gate drive and V5 regulator.
Charge current for gate drive can produce current pulses
of hundreds of milliamperes. Bypass this pin with a low
ESR capacitor.
When V IN is below 2.55V the part will go into supply
undervoltage lockout where the gate driver is driven low.
This, along with gate drive undervoltage lockout, prevents
unpredictable behavior during power up.
PGND (Pin 20): Power Driver Ground. This ground comes
from the MOSFET gate driver. This pin can have several
hundred milliamperes of current on it when the external
MOSFET is being turned off.
Oscillator
SYNC (Pin 6): The SYNC pin can be used to synchronize
the part to an external clock. The oscillator frequency
should be set close to the external clock frequency.
Synchronizing the clock to an external reference is useful
for creating more stable positioning of the switcher volt-
age and current harmonics. This pin can be left open or
tied to ground if not used.
C T (Pin 7): The oscillator capacitor pin is used in conjunc-
tion with R T to set the oscillator frequency. For R T = 16.9k:
C OSC (nf) = 129/f OSC (kHz)
R T (Pin 8): A resistor to ground sets the charge and
discharge currents of the oscillator capacitor. The nomi-
nal value is 16.9k. It is possible to adjust this resistance
± 25% to set oscillator frequency more accurately.
Gate Drive
GATE (Pin 1): This pin connects to the gate of an external
N-channel MOSFET. This driver is capable of sinking and
sourcing at least 300mA.
The GCL pin sets the upper voltage of the gate drive. The
GATE pin will not be activated until V IN reaches a minimum
voltage as defined by the GCL pin (gate undervoltage
lockout).
The gate drive output has current limit protection to safe
guard against accidental shorts.
GCL (Pin 3): This pin sets the maximum gate voltage to the
GATE pin to the MOSFET gate drive. This pin should be
either tied to a zener, a voltage source, or V IN .
If the pin is tied to a zener or a voltage source, the
maximum gate drive voltage will be approximately V GCL
– 0.2V. If it is tied to V IN , the maximum gate voltage is
approximately V IN – 1.6.
1738fa
6
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