参数资料
型号: LT1739IFE#TRPBF
厂商: Linear Technology
文件页数: 18/20页
文件大小: 0K
描述: IC AMP XDSL LINE DRV DUAL20TSSOP
标准包装: 2,500
类型: 线路驱动器,发射器
驱动器/接收器数: 2/0
电源电压: 5 V ~ 12 V
安装类型: 表面贴装
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 20-TSSOP-EP
包装: 带卷 (TR)
7
LT1739
1739fas, sn1739
APPLICATIO S I FOR ATIO
WU
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The LT1739 is a high speed, 200MHz gain bandwidth
product, dual voltage feedback amplifier with high output
current drive capability, 500mA source and sink. The
LT1739 is ideal for use as a line driver in xDSL data
communication applications. The output voltage swing
has been optimized to provide sufficient headroom when
operating from
±12V power supplies in full-rate ADSL
applications. The LT1739 also allows for an adjustment of
the operating current to minimize power consumption. In
addition, the LT1739 is available in small footprint
3mm
× 4mm DFN and 20-lead TSSOP surface mount
package to minimize PCB area in multiport central office
DSL cards.
To minimize signal distortion, the LT1739 amplifiers are
decompensated to provide very high open-loop gain at
high frequency. As a result each amplifier is frequency
stable with a closed-loop gain of 10 or more. If a closed-
loop gain of less than 10 is desired, external frequency
compensating components can be used.
Setting the Quiescent Operating Current
Power consumption and dissipation are critical concerns
in multiport xDSL applications. Two pins, Shutdown
(SHDN) and Shutdown Reference (SHDNREF), are pro-
vided to control quiescent power consumption and allow
for the complete shutdown of the driver. The quiescent
current should be set high enough to prevent distortion
induced errors in a particular application, but not so high
that power is wasted in the driver unnecessarily. A good
starting point to evaluate the LT1739 is to set the quiescent
current to 10mA per amplifier.
The internal biasing circuitry is shown in Figure 1. Ground-
ing the SHDNREF pin and directly driving the SHDN pin with
a voltage can control the operating current as seen in the
Typical Performance Characteristics. When the SHDN pin
is less than SHDNREF + 0.4V, the driver is shut down and
consumes typically only 100
A of supply current and the
outputs are in a high impedance state. Part to part varia-
tions, however, will cause inconsistent control of the qui-
escent current if direct voltage drive of the SHDN pin is used.
Using a single external resistor, RBIAS, connected in one of
two ways provides a much more predictable control of the
quiescent supply current. Figure 2 illustrates the effect
on supply current per amplifier with RBIAS connected
between the SHDN pin and the 12V V+ supply of the
LT1739 and the approximate design equations. Figure 3
illustrates the same control with RBIAS connected between
the SHDNREF pin and ground while the SHDN pin is tied
to V+. Either approach is equally effective.
Figure 1. Internal Current Biasing Circuitry
2k
SHDN
SHDNREF
TO
START-UP
CIRCUITRY
1k
1739 F01
IBIAS
TO AMPLIFIERS
BIAS CIRCUITRY
2I
I
2I
5I
2
5
IBIAS =
ISUPPLY PER AMPLIFIER (mA) = 64 IBIAS
ISHDN = ISHDNREF
RBIAS (k)
0
I SUPPLY
PER
AMPLIFIER
(mA)
10
20
30
5
15
25
10
1739 F02
7
40
70
100
130
160
190
VS = ±12V
V+ = 12V
RBIAS
SHDN
SHDNREF
RBIAS =
25.6 – 2k
V+ – 1.2V
IS PER AMPLIFIER (mA)
25.6
V+ – 1.2V
RBIAS + 2k
RBIAS (k)
4
7
10
50
90
130
170
210
250
30
70
100
150
190
230
270 290
I SUPPLY
PER
AMPLIFIER
(mA)
20
25
30
35
40
1739 F03
5
10
15
0
45
VS = ±12V
V+ = 12V
RBIAS
SHDN
SHDNREF
RBIAS =
64 – 5k
V+ – 1.2V
IS PER AMPLIFIER (mA)
64
V+ – 1.2V
RBIAS + 5k
Figure 2. RBIAS to V+ Current Control
Figure 3. RBIAS to Ground Current Control
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