参数资料
型号: LT1766HFE#TRPBF
厂商: Linear Technology
文件页数: 27/30页
文件大小: 0K
描述: IC REG BUCK ADJ 1.5A 16TSSOP
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 1.2 V ~ 54 V
输入电压: 5.5 V ~ 60 V
PWM 型: 电流模式
频率 - 开关: 200kHz
电流 - 输出: 1.5A
同步整流器:
工作温度: -40°C ~ 140°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 16-TSSOP-EP
LT1766/LT1766-5
APPLICATIONS INFORMATION
Note 44, pages 29 and 30. For our purposes here a fudge
factor (ff) is used. The value for ff is about 1.2 for higher
load currents and L ≥15μH. It increases to about 2.0 for
smaller inductors at lower load currents.
Keep in mind that during start-up and output overloads,
average diode current may be much higher than with nor-
mal loads. Care should be used if diodes rated less than
1A are used, especially if continuous overload conditions
Input Capacitor I RMS = ( ff )( I OUT )
V OUT
V IN
must be tolerated.
BOOST Pin Voltage
I P-P =
DC = Duty Cycle =
I COUT ( RMS ) =
I OUT IN OUT +
ff = 1.2 to 2.0
The output capacitor ripple current for the positive-to-
negative converter is similar to that for a typical buck
regulator—it is a triangular waveform with peak-to-peak
value equal to the peak-to-peak triangular waveform of the
inductor. The low output ripple design in Figure 15 places
the input capacitor between V IN and the regulated negative
output. This placement of the input capacitor signi?cantly
reduces the size required for the output capacitor (versus
placing the input capacitor between V IN and ground).
The peak-to-peak ripple current in both the inductor and
output capacitor (assuming continuous mode) is:
DC ? V IN
f ? L
V OUT + V F
V OUT + V IN + V F
I P-P
12
The output ripple voltage for this con?guration is as low
as the typical buck regulator based predominantly on the
inductor’s triangular peak-to-peak ripple current and the
ESR of the chosen capacitor (see Output Ripple Voltage
in Applications Information).
Diode Current
Average diode current is equal to load current. Peak diode
current will be considerably higher.
Peak diode current:
Continuous Mode =
( V + V  ) ( V IN )( V OUT )
V IN 2 ( L )( f )( V IN + V OUT )
To ensure that the BOOST pin voltage does not exceed its
absolute maximum rating of 68V with respect to device
GND pin voltage, care should be taken in the generation of
boost voltage. For the conventional method of generating
boost voltage, shown in Figure 1, the voltage at the BOOST
pin during switch on time is approximately given by:
V BOOST (GND pin) = (V IN – V GNDPIN ) + V C2
where:
V C2 = (D2+) – V D2 – (D1+) + V D1
= voltage across the boost capacitor
For the positive-to-negative converter shown in Figure 15,
the conventional Buck output node is grounded (D2+) = 0V
and the catch diode (D1+) is connected to the negative
output = V OUT = –12V. Absolute maximum ratings should
also be observed with the GND pin now at –12V. It can be
seen that for V D1 = V D2 :
V C2 = (D2+) – (D1+) = |V OUT | = 12V
The maximum V IN voltage allowed for the device (GND
pin at –12V) is 48V.
The maximum V IN voltage allowed without exceeding the
BOOST pin voltage absolute maximum rating is given by:
V IN(MAX) = Boost (Max) + (V GNDPIN ) – V C2
V IN(MAX) = 68 + (–12) – 12 = 44V
To increase usable V IN voltage, V C2 must be reduced. This
can be achieved by placing a zener diode V Z1 (anode at
C2+) in series with D2.
Note: A maximum limit on V Z1 must be observed to
ensure a minimum V C2 is maintained on the boost
capacitor; referred to as V BOOST(MIN) in the Electrical
Characteristics.
Discontinuous Mode =
2(I OUT )( V OUT )
( L )( f )
1766fc
27
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