参数资料
型号: LT1777CS#PBF
厂商: Linear Technology
文件页数: 14/24页
文件大小: 0K
描述: IC REG BUCK ADJ 0.7A 16SOIC
标准包装: 50
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 1.24 V ~ 30 V
输入电压: 12 V ~ 48 V
PWM 型: 电流模式
频率 - 开关: 100kHz
电流 - 输出: 700mA
同步整流器:
工作温度: 0°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
包装: 管件
供应商设备封装: 16-SOIC
LT1777
APPLICATIO N S I N FOR M ATIO N
tors. Their relatively low ESR in the mid-MHz region can
further attenuate high speed glitches.
Maximum Load/Short-Circuit Considerations
The LT1777 is a current mode controller. It uses the V C
node voltage as an input to a current comparator, which
turns off the output switch on a cycle-by-cycle basis as
this peak current is reached. The internal clamp on the V C
node, nominally 2.0V, then acts as an output switch peak
current limit. This action becomes the switch current limit
specification. The maximum available output power is
then determined by the switch current limit.
A potential controllability problem could occur under
short-circuit conditions. If the power supply output is
short circuited, the feedback amplifier responds to the low
output voltage by raising the control voltage, V C , to its
peak current limit value. Ideally, the output switch would
be turned on, and then turned off as its current exceeded
the value indicated by V C . However, there is finite response
time involved in both the current comparator and turn-off
The solution to this dilemma is to slow down the oscillator
when the FB pin voltage is abnormally low thereby indicat-
ing some sort of short-circuit condition. Figure 7 shows
the typical response of oscillator frequency vs FB pin
voltage. Oscillator frequency is normal until FB voltage
drops to about half of its normal value. Below this point the
oscillator frequency decreases linearly down to a limit of
about 25kHz. This lower oscillator frequency during short-
circuit conditions can then maintain control with the
effective minimum on time.
A further potential problem with short-circuit operation
might occur if the user were operating the part with its
oscillator slaved to an external frequency source via the
SYNC pin. However, the LT1777 has circuitry to automati-
cally disable the sync function when the oscillator is
slowed down due to abnormally low FB voltage.
120
100
R TH = 22k
of the output switch. These result in a minimum on time
t ON(MIN) . When combined with the large ratio of V IN to
80
60
R TH = 10k
R TH = 4.7k
(V F + I ? R), the diode forward voltage plus inductor I ? R
voltage drop, the potential exists for a loss of control.
Expressed mathematically the requirement to maintain
control is:
40
20
R TH
LT1777
FB
( )( )
f t
≤ F
ON
V + I ? R
V IN
0
0
0.25 0.50 0.75 1.00 1.25
FB DIVIDER THEVENIN VOLTAGE (V)
1777 F07
where:
f = switching frequency
t ON = switch on time
V F = diode forward voltage
V IN = Input voltage
I ? R = inductor I ? R voltage drop
If this condition is not observed, the current will not be
limited at I PK , but will cycle-by-cycle ratchet up to some
higher value. Using the nominal LT1777 clock frequency
of 100kHz, a V IN of 48V and a (V F + I ? R) of say, 0.7V, the
maximum t ON to maintain control would be approximately
140ns, an unacceptably short time.
14
Figure 7. Oscillator Frequency vs FB Divider
Thevenin Voltage and Impedance
Feedback Divider Considerations
An LT1777 application typically includes a resistive divider
between V OUT and ground, the center node of which drives
the FB pin to the reference voltage V REF . This establishes
a fixed ratio between the two resistors, but a second
degree of freedom is offered by the overall impedance
level of the resistor pair. The most obvious effect this has
is one of efficiency—a higher resistance feedback divider
will waste less power and offer somewhat higher effi-
ciency, especially at light load.
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