参数资料
型号: LT1942EUF#TRPBF
厂商: Linear Technology
文件页数: 11/16页
文件大小: 0K
描述: IC REG SW QUAD TFT LCD 24-QFN
标准包装: 2,500
应用: 转换器,TFT
输入电压: 2.6 V ~ 16 V
输出数: 4
输出电压: 1.25 V ~ 36 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-WFQFN 裸露焊盘
供应商设备封装: 24-QFN 裸露焊盘(4x4)
包装: 带卷 (TR)
LT1942
APPLICATIO S I FOR ATIO
Setting the Output Voltages
Unlike charge-pump-based TFT supplies, the LT1942 TFT
outputs can all be independently set. The AV DD , V OFF and
V ON outputs are all inductively based DC/DC converters.
As such, the output voltages are set by choosing the right
feedback divider ratio. The AV DD feedback pin is FB1 and
the reference voltage is 1.25V. The V OFF feedback pin is
NFB2 and the reference voltage is –150mV. The V ON
feedback pin is FB3 and the reference voltage is 1.25V. The
LED driver is also an inductively based DC/DC converter.
Output Disconnect
The V ON switching regulator has built in output discon-
nect. When the V ON supply is enabled, the boost converter
will charge up the D3 node. With the output disconnect
PNP (Q5) turned off, the voltage on V OUT3 will be zero.
Once the power sequencing circuitry turns on the PNP,
V OUT3 will go to nearly the same voltage as D3.
The V OFF switching regulator naturally achieves output
disconnect due to the switching topology (inverting con-
figuration). When the LT1942 is in shutdown, V OFF will go
to zero volts.
latches low turning on the PMOS device and bringing the
AV DD output quickly to the desired voltage.
Soft-Start
The higher current regulators, AV DD and LED, have user
programmable soft-start functions built into the part.
Simply place a capacitor from the SS1 pin to GND to
achieve soft-start for the AV DD switcher. For the LED
switcher, place a capacitor from the SS4 pin to GND. A
good value for both soft-start capacitors is 0.1 μ F. The
soft-start time is dependent on the load characteristics
which will vary depending on the type and size of the TFT
display. It is a good practice to experiment to determine
the best value for the soft-start capacitors.
Power Sequencing
The TFT supply has integrated supply sequencing built-in
to ensure proper initiation of the TFT display. Figure 1
shows a state diagram of the power sequencing circuitry.
The power sequencing circuitry insures that the AV DD
supply comes up first, then the negative V OFF supply and
lastly the V ON positive supply. To pick the CT capacitor for
a particular delay, use the following equation:
The AV DD switching regulator provides a PGOOD pin to be
used for an external output disconnect function. This pin
can drive the gate of a PMOS device. When the LT1942 is
C T =
10 μ A ? t DELAY
0 . 7 V
first enabled, the AV DD switching regulator begins to
charge up the output capacitor. Since PGOOD is still an
open collector at this point, the PMOS device is turned off,
leaving the AV DD output at zero volts. Once the output
capacitor charges to 97% of the final value, PGOOD
Figure 2 shows the power sequencing during start-up of
the TFT power supply for the circuit shown in the figure on
the first page of this data sheet. All bias supplies start up
in a well controlled and well timed manner. The LED
backlight driver is independently controlled via the CTRL4
pin.
1942fb
11
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