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| 型号： | LT1956-5IGN |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 稳压器 |
| 英文描述： | 3 A SWITCHING REGULATOR, 570 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封装： | 0.150 INCH, PLASTIC, SSOP-16 |
| 文件页数： | 11/24页 |
| 文件大小： | 437K |
| 代理商： | LT1956-5IGN |
19
LT1956/LT1956-5
APPLICATIO S I FOR ATIO
WU
UU
–
+
1.22V
VSW
VC
LT1956
GND
1956 F09
R1
OUTPUT
ESR
CF
CC
RC
RO
200k
ERROR
AMPLIFIER
FB
R2
C1
RL
CURRENT MODE
POWER STAGE
gm = 2mho
gm =
2000
mho
+
TANTALUM
FREQUENCY (Hz)
GAIN
(dB)
80
60
40
20
0
–20
–40
PHASE
(DEG)
180
150
120
90
60
30
0
1956 F10
GAIN
PHASE
10
1k
10k
1M
100
100k
Figure 9. Model for Loop Response
Figure 10. Overall Loop Response
In questionable cases a prototype supply should be
built and exercised to verify acceptable operation.
2. The simultaneous requirements of high VIN, low VOUT
and high current can result in an unacceptably short
minimum switch on time. Cycle skipping and/or odd/
even cycle behavior will result although correct output
voltage is usually maintained.
FREQUENCY COMPENSATION
Before starting on the theoretical analysis of frequency
response, the following should be remembered—the worse
the board layout, the more difficult the circuit will be to
stabilize. This is true of almost all high frequency analog
circuits, read the Layout Considerations section first.
Common layout errors that appear as stability problems
are distant placement of input decoupling capacitor and/
or catch diode, and connecting the VC compensation to a
ground track carrying significant switch current. In addi-
tion, the theoretical analysis considers only first order
non-ideal component behavior. For these reasons, it is
important that a final stability check is made with produc-
tion layout and components.
The LT1956 uses current mode control. This alleviates
many of the phase shift problems associated with the
inductor. The basic regulator loop is shown in Figure 9.
The LT1956 can be considered as two gm blocks, the error
amplifier and the power stage.
Figure 10 shows the overall loop response with a 1nF VC
capacitor and a typical 100
F tantalum output capacitor.
The response is set by the following terms:
Error amplifier: DC gain is set by gm and RO = 2000
200k = 400. Pole set by CC and RO = 1/(2π 200k 1000p)
= 796Hz. Unity gain set by CC and gm = 2000/(2π CC) =
318kHz.
Power stage: DC gain is set by gm and RL (assume 10)
= 2 10 = 20. Pole set by COUT and RL = 1/(2π 100 10)
= 159Hz. Unity gain set by COUT and gm = 2/(2π 100) =
3.18kHz.
Tantalum output capacitor: Zero set by COUT and COUT ESR
= 1/(2
π 100 0.1) = 15.9kHz.
The zero produced by the ESR of the tantalum output
capacitor is very useful in maintaining stability. If better
transient response is required, a zero can be added to the
loop using a resistor (RC) in series with the compensation
capacitor. As the value of RC is increased, transient re-
sponse will generally improve, but two effects limit its
value. First, the combination of output capacitor ESR and
a large RC may stop loop gain rolling off altogether.
Second, if the loop gain is not rolled sufficiently at the
switching frequency, output ripple will perturb the VC pin
enough to cause unstable duty cycle switching similar to
subharmonic oscillation. This may not be apparent at the
output. Small signal analysis will not show this since a
continuous time system is assumed. If needed, an addi-
tional capacitor (CF) can be added to form a pole at
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