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| 型号： | LT1964IS5-SD#TRMPBF |
| 厂商： | Linear Technology |
| 文件页数： | 4/16页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO NEG ADJ .2A TSOT23-5 |
| 产品培训模块： | More Information on LDOs |
| 标准包装： | 500 |
| 稳压器拓扑结构： | 负，可调式 |
| 输出电压： | -1.22 V ~ -20 V |
| 输入电压： | -1.6 V ~ -20 V |
| 电压 - 压降（标准）： | 0.34V @ 200mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 200mA |
| 电流 - 限制（最小）： | 220mA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-5 细型，TSOT-23-5 |
| 供应商设备封装： | TSOT-23-5 |
| 包装： | 带卷 (TR) |
LT1964
ELECTRICAL CHARACTERISTICS The l denotes the speci?cations which apply over the full operating
temperature range, otherwise speci?cations are at T A = 25°C.
Output Voltage Noise
C OUT = 10μF, C BYP = 0.01μF, I LOAD = –200mA, BW = 10Hz to 100kHz
30
μV RMS
ADJ Pin Bias Current
(Notes 2, 7)
30
100
nA
Minimum Input Voltage (Note 12)
I LOAD = –200mA
LT1964-BYP
LT1964-SD
l
l
–1.9
–1.6
–2.8
–2.2
V
V
Shutdown Threshold
SHDN Pin Current (Note 8)
V OUT = Off to On (Positive)
V OUT = Off to On (Negative)
V OUT = On to Off (Positive)
V OUT = On to Off (Negative)
V SHDN = 0V
l
l
l
l
0.25
–0.25
–1
1.6
–1.9
0.8
–0.8
±0.1
2.1
–2.8
1
V
V
V
V
μA
V SHDN = 15V
V SHDN = –15V
6
–3
15
–9
μA
μA
Quiescent Current in Shutdown
Ripple Rejection
V IN = –6V, V SHDN = 0V
V IN – V OUT = –1.5V(Avg), V RIPPLE = 0.5V P-P ,
l
46
3
54
10
μA
dB
f RIPPLE = 120Hz, I LOAD = –200mA
Current Limit
Input Reverse Leakage Current
V IN = –6V, V OUT = 0V
V IN = V OUT(NOMINAL) –1.5V, ΔV OUT = 0.1V
V IN = 20V, V OUT , V ADJ , V SHDN = Open Circuit
l
l
220
350
1
mA
mA
mA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime
Note 2: The LT1964 (adjustable version) is tested and speci?ed for these
conditions with the ADJ pin connected to the OUT pin.
Note 3: Operating conditions are limited by maximum junction
temperature. The regulated output voltage speci?cation will not apply
for all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 4: To satisfy requirements for minimum input voltage, the LT1964
(adjustable version) is tested and speci?ed for these conditions with an
external resistor divider (two 249k resistors) for an output voltage of
–2.44V. The external resistor divider will add a 5μA DC load on the output.
Note 5: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a speci?ed output current. In dropout, the
output voltage will be equal to: (V IN + V DROPOUT ).
Note 6: GND pin current is tested with V IN = V OUT(NOMINAL) and a current
source load. This means the device is tested while operating in its dropout
Note 7: ADJ pin bias current ?ows out of the ADJ pin.
Note 8: Positive SHDN pin current ?ows into the SHDN pin. SHDN pin
current is included in the GND pin current speci?cation.
Note 9: For input-to-output differential voltages greater than 7V, a 50μA
load is needed to maintain regulation.
Note 10: The LT1964 is tested and speci?ed under pulse load conditions
such that T J ? T A . The LT1964E is tested at T A = 25°C. Performance at
–40°C to 125°C is assured by design, characterization and correlation with
statistical process controls. The LT1964I is guaranteed over the full –40°C
to 125°C operating junction temperature range.
Note 11: A parasitic diode exists internally on the LT1964 between the
OUT, ADJ and SHDN pins and the IN pin. The OUT, ADJ and SHDN pins
cannot be pulled more than 0.5V more negative than the IN pin during
fault conditions, and must remain at a voltage more positive than the IN
pin during operation.
Note 12: For the LT1964-BYP, this speci?cation accounts for the operating
threshold of the SHDN pin, which is tied to the IN pin internally. For the
LT1964-SD, the SHDN threshold must be met to ensure device operation.
Note 13: Actual thermal resistance ( θ JA ) junction to ambient will be a
function of board layout. See the Thermal Considerations section in the
Applications Information.
region. This is the worst-case GND pin current. The GND pin current will
decrease slightly at higher input voltages.
1964fb
4
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