参数资料
型号: LT3014EDD#PBF
厂商: Linear Technology
文件页数: 11/16页
文件大小: 0K
描述: IC REG LDO ADJ 20MA 8-DFN
产品培训模块: More Information on LDOs
标准包装: 121
稳压器拓扑结构: 正,可调式
输出电压: 1.22 V ~ 60 V
输入电压: 3 V ~ 80 V
电压 - 压降(标准): 0.35V @ 20mA
稳压器数量: 1
电流 - 输出: 20mA
电流 - 限制(最小): 25mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-WFDFN 裸露焊盘
供应商设备封装: 8-DFN-EP(3x3)
包装: 管件
产品目录页面: 1330 (CN2011-ZH PDF)
LT3014
APPLICATIONS INFORMATION
Protection Features
The LT3014 incorporates several protection features which
make it ideal for use in battery-powered circuits. In ad-
dition to the normal protection features associated with
monolithic regulators, such as current limiting and thermal
limiting, the device is protected against reverse-input volt-
ages, and reverse voltages from output to input.
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal operation,
the junction temperature should not exceed 125°C.
The input of the device will withstand reverse voltages
of 80V. Current ?ow into the device will be limited to less
than 6mA (typically less than 100μA) and no negative
voltage will appear at the output. The device will protect
both itself and the load. This provides protection against
batteries which can be plugged in backward.
The ADJ pin can be pulled above or below ground by as
much as 7V without damaging the device. If the input is
left open circuit or grounded, the ADJ pin will act like an
open circuit when pulled below ground, and like a large
resistor (typically 100k) in series with a diode when pulled
above ground. If the input is powered by a voltage source,
pulling the ADJ pin below the reference voltage will cause
the device to current limit. This will cause the output to go
to an unregulated high voltage. Pulling the ADJ pin above
the reference voltage will turn off all output current.
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp volt-
age if the output is pulled high, the ADJ pin input current
must be limited to less than 5mA. For example, a resistor
divider is used to provide a regulated 1.5V output from the
1.22V reference when the output is forced to 60V. The top
resistor of the resistor divider must be chosen to limit the
current into the ADJ pin to less than 5mA when the ADJ
pin is at 7V. The 53V difference between the OUT and ADJ
pins divided by the 5mA maximum current into the ADJ
pin yields a minimum top resistor value of 10.6k.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled
to ground, pulled to some intermediate voltage, or is left
open circuit. Current ?ow back into the output will follow
the curve shown in Figure 4. The rise in reverse output
current above 7V occurs from the breakdown of the 7V
clamp on the ADJ pin. With a resistor divider on the
regulator output, this current will be reduced depending
on the size of the resistor divider.
When the IN pin of the LT3014 is forced below the OUT
pin or the OUT pin is pulled above the IN pin, input cur-
rent will typically drop to less than 2μA. This can happen
if the input of the LT3014 is connected to a discharged
(low voltage) battery and the output is held up by either
a backup battery or a second regulator circuit. The state
of the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.
50
V OUT = V ADJ
T J = 25 C
45 V IN = 0V
40
35
30
25
ADJ PIN
ESD CLAMP
20
15
10
5
CURRENT FLOWS
INTO OUTPUT PIN
0
0
1
2
3
4
5
6
7
8
9
10
OUTPUT VOLTAGE (V)
3014 F04
Figure 4. Reverse Output Current
3014fd
11
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