参数资料
型号: LT3070IUFD#PBF
厂商: Linear Technology
文件页数: 13/28页
文件大小: 0K
描述: IC REG LDO ADJ 5A 28QFN
产品培训模块: LT3070 - 5A, Low Noise, Programmable Output, 85mV Dropout Linear Regulator
标准包装: 73
稳压器拓扑结构: 正,可调式
输出电压: 0.8 V ~ 1.8 V
输入电压: 0.95 V ~ 3 V
电压 - 压降(标准): 0.085V @ 5A
稳压器数量: 1
电流 - 输出: 5A
电流 - 限制(最小): 5.1A
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-QFN(4x5)
包装: 管件
LT3070
PIN FUNCTIONS
+
V BIAS
+
V IN
BIAS
EN SENSE
IN OUT
V O2 LT3070
V O1 PWRGD
V O0
MARGSEL
MARGTOL
VIOC REF/BYP
GND
R P
R P
3070 F01
LOAD
V O0 , V O1 and V O2 (Pins 23, 24, 25): Output Voltage Se-
lect. These three-state pins combine to select a nominal
output voltage from 0.8V to 1.8V in increments of 50mV.
Output voltage is limited to 1.8V maximum by an internal
override of V O1 when V O2 = high . The input logic low
threshold is less than 250mV referenced to GND and the
logic high threshold is greater than V BIAS – 250mV. The
range between these two thresholds as set by a window
comparator defines the logic Hi-Z state. See Table 1 in the
Applications Information section that defines the V O2 , V O1
and V O0 settings versus V OUT .
Figure 1. Kelvin Sense Connection
MARGSEL (Pin 21): Margining Enable and Polarity Selec-
tion. This three-state pin determines both the polarity and
the active state of the margining function. The logic low
threshold is less than 250mV referenced to GND and en-
ables negative voltage margining. The logic high threshold
is greater than V BIAS – 250mV and enables positive voltage
margining. The voltage range between these two logic
thresholds as set by a window comparator defines the
logic Hi-Z state and disables the margining function.
MARGTOL (Pin 22): Margining Tolerance. This three-
state pin selects the absolute value of margining (1%,
3% or 5%) if enabled by the MARGSEL input. The logic
low threshold is less than 250mV referenced to GND and
enables either ±1% change in V OUT depending on the state
of the MARGSEL pin. The logic high threshold is greater
than V BIAS – 250mV and enables either ±5% change in
V OUT depending on the state of the MARGSEL pin. The
voltage range between these two logic thresholds as set
by a window comparator defines the logic Hi-Z state and
enables either ±3% change in V OUT depending on the state
of the MARGSEL pin.
BIAS (Pin 27): Bias Supply. This pin supplies current to
the internal control circuitry and the output stage driving
the pass transistor. The LT3070 requires a minimum 2.2μF
bypass capacitor for stability and proper operation. To
ensure proper operation, the BIAS voltage must satisfy
the following conditions: 2.2V ≤ V BIAS ≤ 3.6V and V BIAS ≥
(1.25 ? V OUT + 1V). For V OUT ≤ 0.95V, the minimum BIAS
voltage is limited to 2.2V.
EN (Pin 28): Enable. This pin enables/disables the output
device only. The internal reference and all support functions
are active if V BIAS is above its UVLO threshold. Pulling
EN low keeps the reference circuit active, but disables
the output pass transistor and puts the LT3070 into a low
power nap mode. The maximum rising EN threshold is
ratioed to 0.56 % of V BIAS and the minimum falling ENx
threshold is 0.36 % of V BIAS . Drive the EN pin with either
a digital logic port or an open-collector NPN or an open-
drain NMOS terminated with a pull-up resistor to V BIAS .
The pull-up resistor must be less than 35k to meet the V IH
condition of the EN pin. If unused, connect EN to BIAS.
3070fb
For more information www.linear.com/LT3070
13
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