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参数资料
| 型号： | LT3434EFE#TR |
| 厂商： | Linear Technology |
| 文件页数： | 19/24页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 3A 16TSSOP |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1.25 V ~ 54 V |
| 输入电压： | 3.3 V ~ 60 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 200kHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 16-TSSOP-EP |
LT3434
APPLICATIO S I FOR ATIO
threshold during normal operation, the C T pin will be
discharged a nd PG inactive, resulting in a non Power Good
cycle when SHDN is taken above its threshold. Figure 9
shows the power good operation with PGFB connected to
FB and the capacitance on C T = 0.1 μ F. The PGFB pin has
noise during start-up and Burst Mode operation. If erratic
operation occurs during these conditions a small filter
capacitor from the PGFB pin to ground will ensure proper
operation. Figure 10 shows several different configura-
tions for the LT3434 Power Good circuitry.
a limited amount of driver capability and is susceptible to
LAYOUT CONSIDERATIONS
V OUT
500mV/DIV
PG
100k TO V IN
V CT
500mV/DIV
V SHDN
2V/DIV
As with all high frequency switchers, when considering
layout, care must be taken in order to achieve optimal
electrical, thermal and noise performance. For maximum
efficiency switch rise and fall times are typically in the
nanosecond range. To prevent noise both radiated and
conducted the high speed switching current path, shown
in Figure 11, must be kept as short as possible. This is
implemented in the suggested layout of Figure 12. Short-
ening this path will also reduce the parasitic trace induc-
TIME (10ms/DIV)
3434 F09
tance of approximately 25nH/inch. At switch off, this
Figure 9. Power Good
PG at 80% V OUT with 100ms Delay
parasitic inductance produces a flyback spike across the
PG at V IN > 4V with 100ms Delay
V IN
200k
V IN
200k
PG
LT3434
PGFB
153k
12k
V OUT = 3.3V
C OUT
PG
LT3434
PGFB
511k
200k
165k
V OUT = 3.3V
C OUT
FB
FB
C T
100k
C T
100k
0.27 μ F
V OUT Disconnect at 80% V OUT
with 100ms Delay
V IN
200k
PG
0.27 μ F
V OUT Disconnect 3.3V Logic Signal
with 100 μ s Delay
V IN
200k
PG
LT3434
153k
C OUT
V OUT = 3.3V
LT3434
C OUT
V OUT = 12V
PGFB
FB
12k
PGFB
FB
866k
C T
0.27 μ F
100k
C T
270pF
100k
3434 F10
Figure 10. Power Good Circuits
3434fb
19
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LT3434IFE | 功能描述:IC REG BUCK ADJ 3A 16TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 设计资源:Design Support Tool 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:3V 输入电压:0.75 V ~ 2 V PWM 型:- 频率 - 开关:- 电流 - 输出:100mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 包装:剪切带 (CT) 供应商设备封装:TSOT-23-5 其它名称:AS1323-BTTT-30CT |
| LT3434IFE#PBF | 功能描述:IC REG BUCK ADJ 3A 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 设计资源:Design Support Tool 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:3V 输入电压:0.75 V ~ 2 V PWM 型:- 频率 - 开关:- 电流 - 输出:100mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 包装:剪切带 (CT) 供应商设备封装:TSOT-23-5 其它名称:AS1323-BTTT-30CT |
| LT3434IFE#PBF | 制造商:Linear Technology 功能描述:IC, STEP-DOWN REGULATOR, 16-TSSOP |
| LT3434IFE#TR | 功能描述:IC REG BUCK ADJ 3A 16TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 设计资源:Design Support Tool 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:3V 输入电压:0.75 V ~ 2 V PWM 型:- 频率 - 开关:- 电流 - 输出:100mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 包装:剪切带 (CT) 供应商设备封装:TSOT-23-5 其它名称:AS1323-BTTT-30CT |
| LT3434IFE#TRPBF | 功能描述:IC REG BUCK ADJ 3A 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 设计资源:Design Support Tool 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:3V 输入电压:0.75 V ~ 2 V PWM 型:- 频率 - 开关:- 电流 - 输出:100mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 包装:剪切带 (CT) 供应商设备封装:TSOT-23-5 其它名称:AS1323-BTTT-30CT |
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